CAT34C02
FEATURES
2-Kb I
2
C EEPROM for DDR2 DIMM Serial Presence Detect
DEVICE DESCRIPTION
The CAT34C02 is a 2-Kb Serial CMOS EEPROM,
internally organized as 16 pages of 16 bytes each, for
a total of 256 bytes of 8 bits each.
It features a 16-byte page write buffer and supports
both the Standard (100 kHz) as well as Fast (400 kHz)
I
2
C protocol.
Write operations can be inhibited by taking the WP pin
High (this protects the entire memory) or by setting an
internal Write Protect flag via Software command (this
protects the lower half of the memory).
In addition to Permanent Software Write Protection,
the CAT34C02 also features JEDEC compatible
Reversible Software Write Protection for DDR2 Serial
Presence Detect (SPD) applications operating over
the 1.7 V to 3.6 V supply voltage range.
The CAT34C02 is fully backwards compatible with
earlier DDR1 SPD applications operating over the
1.7 V to 5.5 V supply voltage range.
■
Supports Standard and Fast I
2
C Protocol
■
1.7 V to 5.5 V Supply Voltage Range
■
16-Byte Page Write Buffer
■
Hardware Write Protection for entire memory
■
Software Write Protection for lower 128 Bytes
■
Schmitt Triggers and Noise Suppression Filters
on I
2
C Bus Inputs (SCL and SDA).
■
Low power CMOS technology
■
1,000,000 program/erase cycles
■
100 year data retention
■
RoHS compliant
8-pin TSSOP and TDFN packages
“
”
&
“
”
■
Industrial temperature range
PIN CONFIGURATION
TSSOP (Y)
TDFN (VP2)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
FUNCTIONAL SYMBOL
VCC
For the location of Pin 1, please consult the
corresponding package drawing.
SCL
A2, A1, A0
WP
CAT34C02
SDA
PIN FUNCTIONS
A
0
, A
1
, A
2
SDA
SCL
WP
V
CC
V
SS
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
VSS
* Catalyst carries the I
2
C protocol under a license from the Philips Corporation.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1095, Rev. C