CAT5251
Quad Digitally Programmable Potentiometer (DPP™) with
256 Taps and SPI Interface
FEATURES
Four linear-taper digitally programmable
potentiometers
254 resistor taps per potentiometer
End to end resistance 50kΩ or 100kΩ
Potentiometer control and memory access via
SPI interface
Low wiper resistance, typically 100Ω
Nonvolatile memory storage for up to four
wiper settings for each potentiometer
Automatic recall of saved wiper settings at
power up
2.5 to 6.0 volt operation
Standby current less than 1µA
1,000,000 nonvolatile WRITE cycles
100 year nonvolatile memory data retention
SOIC 24-lead and TSSOP 24-lead
Industrial temperature range
DESCRIPTION
The CAT5251 is four Digitally Programmable
Potentiometers (DPPs™) integrated with control logic
and 16 bytes of NVRAM memory. Each DPP consists
of a series of resistive elements connected between
two externally accessible end points. The tap points
between each resistive element are connected to the
wiper outputs with CMOS switches. A separate 8-bit
control register (WCR) independently controls the
wiper tap switches for each DPP. Associated with
each wiper control register are four 8-bit non-volatile
memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or
any of the non-volatile data registers is via a SPI serial
bus. On power-up, the contents of the first data
register (DR0) for each of the four potentiometers is
automatically loaded into its respective wiper control
register.
The CAT5251 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications. It is available in the -40°C to 85°C
industrial operating temperature range and offered in
a 24-lead SOIC and TSSOP package.
PIN CONFIGURATION
SOIC 24-Lead (W)
TSSOP 24-Lead (Y)
SO
A0
R
W3
R
H3
R
L3
NC
V
CC
R
LO
R
HO
R
WO
¯¯¯
CS
¯¯¯
WP
1
2
3
4
5
24
23
22
21
20
¯¯¯¯¯
HOLD
SCK
R
L2
R
H2
R
W2
NC
GND
R
W1
R
H1
R
L1
A1
SI
WP
A0
A1
HOLD
CS
SCK
SI
SO
FUNCTIONAL DIAGRAM
R
H0
R
H1
R
H2
R
H3
SPI BUS
INTERFACE
WIPER
CONTROL
REGISTERS
R
W0
R
W1
R
W2
6
CAT
19
7
5251
18
8
9
10
11
12
17
16
15
14
13
CONTROL
LOGIC
NONVOLATILE
DATA
REGISTERS
R
L0
R
L1
R
L2
R
L3
R
W3
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. MD-2017 Rev. F
CATALYST [ CATALYST SEMICONDUCTOR ]
