CAT803, CAT809, CAT810
DETAILED DESCRIPTIOnS
RESET TIMInG
The reset signal is asserted LOW for the CAT803/
CAT809 and HIGH for the CAT80 when the power
supply voltage falls below the threshold trip voltage and
remains asserted for at least 40ms after the power
supply voltage has risen above the threshold.
5V
V
TH
0V
T
D
5V
RESET
0V
T
R
(140msec
minimum)
V
CC
CAT803, CAT809
5V
RESET
0V
CAT810
figure 1. Reset Timing Diagram
V
CC
TRAnSIEnT RESPOnSE
The CAT803/CAT809/CAT80 protect
µPs
against
brownout failure. Short duration transients of 4µsec
or less and 00mV amplitude typically do not cause a
false RESET.
Figure 2 shows the maximum pulse duration of negative-
going V
CC
transients that do not cause a reset condition.
As the amplitude of the transient goes further below
the threshold (increasing V
TH
- V
CC
), the maximum
pulse duration decreases. In this test, the V
CC
starts
from an initial voltage of 0.5V above the threshold and
drops below it by the amplitude of the overdrive voltage
(V
TH
- V
CC
).
figure 2. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive
Doc. No. 3004, Rev. X
TRANSIENT DURATION (µs)
6
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CATALYST [ CATALYST SEMICONDUCTOR ]
