CAT809, CAT810
DETAILED DESCRIPTIONS
RESET TIMING
The reset signal is asserted LOW for the CAT809 and HIGH for the CAT810 when the power supply voltage falls below
the threshold trip voltage and remains asserted for at least 140ms after the power supply voltage has risen above the
threshold.
Power 5V
Supply
Voltage 0V
Threshold
Voltage
Reset Timeout Period
140ms
minimum
RESET
5V
0V
5V
CAT809
RESET
0V
CAT810
FIGURE 1. RESET TIMING DIAGRAM
V
CC
TRANSIENT RESPONSE
The CAT809/810 protect
µPs
against brownout failure. Short duration transients of 4µsec or less and 100 mV
amplitude typically do not cause a false RESET.
Figure 2 shows the maximum pulse duration of negative-going V
CC
transients that do not cause a reset condition. As
the amplitude of the transient goes further below the threshold (increasing V
TH
- V
CC
), the maximum pulse duration
decreases. In this test, the V
CC
starts from an initial voltage of 0.5V above the threshold and drops below it by the
amplitude of the overdrive voltage (V
TH
- V
CC
).
30
TRANSIENT DURATION [µs)
25
20
15
10
5
0
1
10
CAT809M
TAMB = 25°C
CAT809Z
100
1000
RESET OVERDRIVE VTH - VCC [mV]
FIGURE 2. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive
Patent Pending
7
Doc. No. 3004, Rev. S
CATALYST [ CATALYST SEMICONDUCTOR ]
