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CAT93C56S-TE13 参数 Datasheet PDF下载

CAT93C56S-TE13图片预览
型号: CAT93C56S-TE13
PDF下载: 下载PDF文件 查看货源
内容描述: 1K / 2K / 2K / 4K / 16K位Microwire串行E2PROM [1K/2K/2K/4K/16K-Bit Microwire Serial E2PROM]
分类和应用: 可编程只读存储器
文件页数/大小: 9 页 / 65 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT93C46/56/57/66/86
1K/2K/2K/4K/16K-Bit Microwire Serial E
2
PROM
FEATURES
s
High Speed Operation:
s
Power-Up Inadvertant Write Protection
s
1,000,000 Program/Erase Cycles
s
100 Year Data Retention
s
Commercial, Industrial and Automotive
– 93C46/56/57/66: 1MHz
– 93C86: 3MHz
s
Low Power CMOS Technology
s
1.8 to 6.0 Volt Operation
s
Selectable x8 or x16 Memory Organization
s
Self-Timed Write Cycle with Auto-Clear
s
Hardware and Software Write Protection
Temperature Ranges
s
Sequential Read (except 93C46)
s
Program Enable (PE) Pin (93C86 only)
DESCRIPTION
The CAT93C46/56/57/66/86 are 1K/2K/2K/4K/16K-bit
Serial E
2
PROM memory devices which are configured
as either registers of 16 bits (ORG pin at V
CC
) or 8 bits
(ORG pin at GND). Each register can be written (or read)
serially by using the DI (or DO) pin. The CAT93C46/56/
57/66/86 are manufactured using Catalyst’s advanced
CMOS E
2
PROM floating gate technology. The devices
are designed to endure 1,000,000 program/erase cycles
and have a data retention of 100 years. The devices are
available in 8-pin DIP, 8-pin SOIC or 8-pin TSSOP
packages.
PIN CONFIGURATION
DIP Package (P)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
SOIC Package (J)
1
2
3
4
8
7
6
5
ORG
GND
DO
DI
SOIC Package (S)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
SOIC Package (K)
1
2
3
4
8
7
6
5
VCC
NC (PE*)
ORG
GND
TSSOP Package (U)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC (PE*)
ORG
GND
VCC
NC (PE*)
NC (PE*)
VCC
ORG
CS
GND
SK
VCC
CS
NC (PE*) SK
ORG
DI
GND
DO
*Only For 93C86
PIN FUNCTIONS
Pin Name
CS
SK
DI
DO
V
CC
GND
ORG
NC
PE*
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
+1.8 to 6.0V Power Supply
Ground
Memory Organization
No Connection
Program Enable
93C46/56/57/66/86
F01
BLOCK DIAGRAM
VCC
GND
ORG
MEMORY ARRAY
ORGANIZATION
ADDRESS
DECODER
DATA
REGISTER
DI
CS
PE*
MODE DECODE
LOGIC
OUTPUT
BUFFER
Note: When the ORG pin is connected to VCC, the X16 organiza
tion is selected. When it is connected to ground, the X8 pin
is selected. If the ORG pin is left unconnected, then an
internal pullup device will select the X16 organization.
SK
CLOCK
GENERATOR
DO
93C46/56/57/66/86 F02
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 25056-00 2/98 M-1