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CAT9555HV6I-G 参数 Datasheet PDF下载

CAT9555HV6I-G图片预览
型号: CAT9555HV6I-G
PDF下载: 下载PDF文件 查看货源
内容描述: 16位I²C和SMBus I / O端口与中断 [16-bit I2C and SMBus I/O Port with Interrupt]
分类和应用: 并行IO端口微控制器和处理器外围集成电路
文件页数/大小: 17 页 / 229 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT9555
16-bit I
2
C and SMBus I/O Port with Interrupt
FEATURES
s
400kHz I
2
C bus compatible*
s
2.3V to 5.5V operation
s
Low stand-by current
s
5V tolerant I/Os
s
16 I/O pins that default to inputs at power-up
s
High drive capability
s
Individual I/O configuration
s
Polarity inversion register
s
Active low interrupt output
s
Internal power-on reset
s
No glitch on power-up
s
Noise filter on SDA/SCL inputs
s
Cascadable up to 8 devices
s
Industrial temperature range
s
RoHS-compliant 24-lead SOIC and TSSOP, and
DESCRIPTION
The CAT9555 is a CMOS device that provides 16-bit
parallel input/output port expansion for I
2
C and SMBus
compatible applications. These I/O expanders provide
a simple solution in applications where additional I/Os
are needed: sensors, power switches, LEDs,
pushbuttons, and fans.
The CAT9555 consists of two 8-bit Configuration ports
(input or output), Input, Output and Polarity inversion
registers, and an I
2
C/SMBus-compatible serial interface.
Any of the sixteen I/Os can be configured as an input or
output by writing to the configuration register. The system
master can invert the CAT9555 input data by writing to
the active-high polarity inversion register.
The CAT9555 features an active low interrupt output
which indicates to the system master that an input state
has changed.
The three address input pins provide the device's
extended addressing capability and allow up to eight
devices to share the same bus. The fixed part of the I
2
C
slave address is the same as the CAT9554, allowing up
to eight of these devices in any combination to be
connected on the same bus.
24-pad TQFN (4 x 4 mm) packages
APPLICATIONS
s
White goods (dishwashers, washing machines)
s
Handheld devices (cell phones, PDAs, digital
cameras)
s
Data Communications (routers, hubs and
servers)
BLOCK DIAGRAM
A0
A1
A2
8-BIT
INPUT/
OUTPUT
PORTS
I/O1.0
I/O1.1
I/O1.2
I/O1.3
I/O1.4
I/O1.5
I/O1.6
I/O1.7
I2C/SMBUS
CONTROL
I/O0.0
I/O0.1
SCL
SDA
INPUT
FILTER
8-BIT
INPUT/
OUTPUT
PORTS
I/O0.2
I/O0.3
I/O0.4
I/O0.5
I/O0.6
I/O0.7
POWER-ON
RESET
VINT
LP FILTER
WRITE pulse
READ pulse
WRITE pulse
READ pulse
VCC
VCC
~
INT
NOTE: ALL I/Os ARE SET TO INPUTS AT RESET
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. MD-9003, Rev. G