CEP6186/CEB6186
V
GS
, Gate to Source Voltage (V)
10
8
6
4
2
0
V
DS
=48V
I
D
=28A
10
3
I
D
, Drain Current (A)
4
10
2
R
DS(ON)
Limit
10ms
100ms
1ms
10
1
DC
T
C
=25 C
T
J
=175 C
Single Pulse
10
-1
0
5
10
15
20
25
10
0
10
0
10
1
10
2
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
V
DD
t
on
V
IN
V
GS
R
GEN
G
R
L
D
V
OUT
t
d(on)
V
OUT
10%
V
DS
, Drain-Source Voltage (V)
Figure 8. Maximum Safe
Operating Area
t
off
t
r
90%
t
d(off)
90%
10%
t
f
INVERTED
90%
S
V
IN
50%
10%
50%
PULSE WIDTH
Figure 9. Switching Test Circuit
Figure 10. Switching Waveforms
10
0
r(t),Normalized Effective
Transient Thermal Impedance
D=0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
10
-1
10
-2
Single Pulse
10
-3
1. R
θJC
(t)=r (t) * R
θJC
2. R
θJC
=See Datasheet
3. T
JM-
T
C
= P* R
θJC
(t)
4. Duty Cycle, D=t1/t2
-5
10
10
-4
10
-3
10
-2
10
-1
10
0
10
1
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
CET [ CHINO-EXCEL TECHNOLOGY ]
