CED9926/CEU9926
PRELIMINARY
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
6
20V , 26A , R
DS(ON)
=30m
Ω
@V
GS
=4.5V.
R
DS(ON)
=40m
Ω
@V
GS
=2.5V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handling capability.
TO-251 & TO-252 package.
D
G
S
G
D
S
D
G
CEU SERIES
TO-252AA(D-PAK)
CED SERIES
TO-251(l-PAK)
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
Drain-Source Diode Forward Current
Maximum Power Dissipation
@Tc=25 C
Derate above 25 C
Operating and Storage Temperature Range
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
STG
Limit
20
12
26
78
26
38
0.25
-55 to 175
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
R
JC
R
JA
6-82
4
50
C/W
C/W
CET [ CHINO-EXCEL TECHNOLOGY ]
