CM6805(A;B)/CM6806A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER for High Density AC Adapter
Functional Description
The CM6805A/CM6806A consists of an ICST (Input
Current Shaping Technique), CCM (Continuous Conduction
Mode) or DCM (Discontinuous Conduction Mode) boost
PFC (Power Factor Correction) front end and a
synchronized PWM (Pulse Width Modulator) back end. The
CM6805A /CM6806A is designed to replace FAN6803 (8
pin SOP package), which is the second generation of the
ML4803 with 8 pin package. It is distinguished from earlier
combo controllers by its low count, innovative input current
shaping technique, and very low start-up and operating
currents. The PWM section is dedicated to peak current
mode operation. It uses conventional trailing-edge
modulation, while the PFC uses leading-edge modulation.
This patented Leading Edge/Trailing Edge (LETE)
modulation technique helps to minimize ripple current in the
PFC DC buss capacitor.
The main improvements from ML4803 are:
1.
Add Green Mode Functions for both PFC and PWM
2.
Remove the one pin error amplifier and add back the
slew rate enhancement gmv, which is using voltage
input instead of current input. This transconductance
amplifier will increase the transient response 5 to 10
times from the conventional OP
3.
VFB PFC OVP comparator
4.
PFC Tri-Fault Detect for UL1950 compliance and
enhanced safety
5.
A feedforward signal from IAC pin is added to do the
automatic slope compensation. This increases the
signal to noise ratio during the light load; therefore,
THD is improved at light load and high input line
voltage.
6.
CM6805A/CM6806A does not require the bleed
resistor and it uses the more than 800k ohm resistor
between IAC pin and rectified line voltage to feed the
initial current before the chip wakes up.
7.
VINOK comparator is added to guaranteed PWM
cannot turn on until VFB reaches 2.5V in which PFC
boost output is about steady state, typical 380V.
8.
A 10mS digital PWM soft start circuit is added
9.
10 pin SOP package
10. No internal Zener but with VCCOVP comparator
The CM6805A/CM6806A operates both PFC and PWM
sections at 67kHz. This allows the use of smaller PWM
magnetic and output filter components, while minimizing
switching losses in the PFC stage.
Several protection features have been built into the
CM6805A/CM6806A. These include soft-start, redundant
PFC overvoltage protection, PFC Tri-Fault Detect, VINOK,
peak current limiting, duty cycle limiting, under-voltage
lockout, reference ok comparator and VCCOVP.
Detailed Pin Descriptions
IAC (Pin 2)
Typically, it has a feedforward resistor, RAC, 800K~5KK ohm
resistor connected between this pin and rectified line input
voltage.
This pin serves 2 purposes:
1.) During the startup condition, it supplies the startup
current; therefore, the system does not requires
additional bleed resistor to start up the chip.
2.) The current of RAC will program the automatic
slope compensation for the system. This
feedforward signal can increase the signal to noise
ratio for the light load condition or the high input line
voltage condition.
ISENSE (Pin 3)
This pin ties to a resistor which senses the PFC input
current. This signal should be negative with respect to the IC
ground. It internally feeds the pulse-by-pulse current limit
comparator and the current sense feedback signal. The
ILIMIT trip level is –1V. The ISENSE feedback is internally
multiplied by a gain of four and compared against the internal
programmed ramp to set the PFC duty cycle. The
intersection of the boost inductor current downslope with the
internal programming ramp determines the boost off-time.
It requires a RC filter between ISENSE and PFC boost
sensing resistor.
VEAO (Pin 4)
This is the PFC slew rate enhanced transconductance
amplifier output which needs to connected with a
compensation network Ground.
VFB (Pin 5)
Besides this is the PFC slew rate enhanced
transconductance input, it also tie to a couple of protection
comparators, PFCOVP, and PFC Tri-Fault Detect
V + I (Pin 6)
This pin is tied to the primary side PWM current sense
resistor or transformer. It provides the internal pulse-by-pulse
current limit for the PWM stage (which occurs at 1.5V) and
the peak current mode feedback path for the current mode
control of the PWM stage. Besides current information, the
optocouple also goes into V + I pin. Therefore, it is the SUM
Amplifier input.
Soft Start can be triggered by the following conditions:
1.)
During the startup (VCC is less than 10V)
2.)
DC to DC short (PWMtrifault is greater thanVCC-0.7V)
2006/10/11
Rev1.0
Champion Microelectronic Corporation
Page 7
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
