CM6807
10-PIN Green-Mode PFC/PWM Combo CONTROLLER for High Density AC Adapte
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PWMtrifault (Pin 7)
This pin is to monitor the DC to DC faults. PWMtrifault
monitors the voltage which is translated by the photocouple
output current. When the output is short, photocouple and
TL431 will not draw any current and PWMtrifault will go
toward VCC.
When PWMtrifault is above VCC-0.7V, the soft start will be
triggered and PWMOUT is turned off. When the load is
lighter, the TL431 will increase the Photocouple current.
When PWMtrifault is below (VCC-1.4)/2, which means it is
below GMth, Green Mode Threshold. PFCOUT will be
turned off due the load is below GMth. The GMth can be
programmed by the user. Typical the GMth is 20% of the
full load.
VCC (Pin 8)
VCC is the power input connection to the IC. The VCC
start-up current is 100uA. The no-load ICC current is 2mA.
VCC quiescent current will include both the IC biasing
currents and the PFC and PWM output currents. Given the
operating frequency and the MOSFET gate charge (Qg),
average PFC and PWM output currents can be calculated
as IOUT = Qg x F. The average magnetizing current
required for any gate drive transformers must also be
included. The VCC pin is also assumed to be proportional
to the PFC output voltage. Internally it is tied to the VCC
OVP comparator (17.9V) providing redundant high-speed
over-voltage protection (OVP) of the PFC stage. VCC also
ties internally to the UVLO circuitry and VREFOK
comparator, enabling the IC at 13V and disabling it at 10V.
VCC must be bypassed with a high quality ceramic bypass
capacitor placed as close as possible to the IC. Good
bypassing is critical to the proper operation of the CM6807.
VCC is typically produced by an additional winding off the
boost inductor or PFC Choke, providing a voltage that is
proportional to the PFC output voltage. Since the VCC OVP
max voltage is 17.9V, an internal shunt limits VCC
overvoltage to an acceptable value. An external clamp,
such as shown in Figure 1, is desirable but not necessary.
VCC
PFCOUT (Pin 9) and PWM OUT (Pin 10)
PFC OUT and PWM OUT are the high-current power driver
capable of directly driving the gate of a power MOSFET with
peak currents up to -1A and +0.5A. Both outputs are actively
held low when VCC is below the UVLO threshold level which
is 15V or VREFOK comparator is low.
Power Factor Correction
Power factor correction makes a nonlinear load look like a
resistive load to the AC line. For a resistor, the current drawn
from the line is in phase with and proportional to the line
voltage, so the power factor is unity (one). A common class
of nonlinear load is the input of most power supplies, which
use a bridge rectifier and capacitive input filter fed from the
line. The peak-charging effect, which occurs on the input
filter capacitor in these supplies, causes brief high-amplitude
pulses of current to flow from the power line, rather than a
sinusoidal current in phase with the line voltage. Such
supplies present a power factor to the line of less than one
(i.e. they cause significant current harmonics of the power
line frequency to appear at their input). If the input current
drawn by such a supply (or any other nonlinear load) can be
made to follow the input voltage in instantaneous amplitude,
it will appear resistive to the AC line and a unity power factor
will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with and proportional to the input
voltage, a way must be found to prevent that device from
loading the line except in proportion to the instantaneous line
voltage. The PFC section of the CM6807 uses a boost-mode
DC-DC converter to accomplish this. The input to the
converter is the full wave rectified AC line voltage. No bulk
filtering is applied following the bridge rectifier, so the input
voltage to the boost converter ranges (at twice line
frequency) from zero volts to the peak value of the AC input
and back to zero.
By forcing the boost converter to meet two simultaneous
conditions, it is possible to ensure that the current draws
from the power line matches the instantaneous line voltage.
One of these conditions is that the output voltage of the
boost converter must be set higher than the peak value of
the line voltage. A commonly used value is 385VFB, to allow
for a high line of 270VAC
rms
. The other condition is that the
current that the converter is allowed to draw from the line at
any given instant must be proportional to the line voltage.
1N5250B
GND
Figure 1. Optional VCC Clam p
This limits the maximum VCC that can be applied to the IC
while allowing a VCC which is high enough to trip the VCC
OVP. An RC filter at VCC is required between boost trap
winding and VCC.
2010/04/20 Rev1.0
Champion Microelectronic Corporation
Page 8
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
