CS51031
Circuit Description: continued
2.4V, the CS charge sense comparator (A4) sets the V
FB
comparator reference to 1.25V completing the startup
cycle.
Buck Regulator Operation
Q1
V
IN
C
IN
R
1
C
O
R
2
R
LOAD
L
Lossless Short Circuit Protection
The CS51031 has ÒlosslessÓ short circuit protection since
there is no current sense resistor required. When the volt-
age at the CS pin (the fault timing capacitor voltage ) reach-
es 2.5V during startup, the fault timing circuitry is enabled.
During normal operation the CS voltage is 2.6V. During a
short circuit or a transient condition, the output voltage
moves lower and the voltage at V
FB
drops. If V
FB
drops
below 1.15V, the output of the fault comparator goes high
and the CS51031 goes into a fast discharge mode. The fault
timing capacitor, CS, discharges to 2.4V. If the V
FB
voltage
is still below 1.15V when the CS pin reaches 2.4V, a valid
fault condition has been detected. The slow discharge
comparator output goes high and enables gate G5 which
sets the slow discharge flip flop. The Vgate flip flop resets
and the output switch is turned off. The fault timing
capacitor is slowly discharged to 1.5V. The CS51031 then
enters a normal startup routine. If the fault is still present
when the fault timing capacitor voltage reaches 2.5V, the
fast and slow discharge cycles repeat as shown in figure 2.
If the V
FB
voltage is above 1.15V when CS reaches 2.4V a
fault condition is not detected, normal operation resumes
and CS charges back to 2.6V. This reduces the chance of
erroneously detecting a load transient as a fault condition.
2.6V
D
1
Control
Feedback
Figure 3. Buck regulator block diagram.
A block diagram of a typical buck regulator is shown in
Figure 3. If we assume that the output transistor is initially
off, and the system is in discontinuous operation, the
inductor current I
L
is zero and the output voltage is at its
nominal value. The current drawn by the load is supplied
by the output capacitor C
O
. When the voltage across C
O
drops below the threshold established by the feedback
resistors R1 and R2 and the reference voltage V
REF
, the
power transistor Q1 switches on and current flows through
the inductor to the output. The inductor current rises at a
rate determined by (V
IN
-V
OUT
)/L. The duty cycle (or ÒonÓ
time) for the CS51031 is limited to 80%. If output voltage
remains higher than nominal during the entire C
OSC
change time, the Q1 does not turn on, skipping the pulse.
V
CS
2.4V
S1
S2
S1
S2
S3
S3
S1
S2
S3
S3
2.5V
1.5V
0V
T
START
START
NORMAL OPERATION
td1
t
FAULT
t
RESTART
td2
FAULT
t
FAULT
0V
V
GATE
1.25V
1.15V
V
FB
Figure 2. Voltage on start capacitor (V
GS
), the gate (V
GATE
), and in the
feedback loop (V
FB
), during startup, normal and fault conditions.
Applications Information
CS51031 Design Example
Specifications 12V to 5V, 3A Buck converter
V
IN
= 12V ±20% (i.e. 14.4V max., 12Vnom., 9.6V min.)
V
OUT
= 5V ±2%
I
OUT
= 0.3A to 3A
Output ripple voltage < 50mV max.
Efficiency > 80%
f
SW
= 200kHz
5
1) Duty cycle estimates
Since the maximum duty cycle D, of the CS51031 is limited
to 80% min., it is necessary to estimate the duty cycle for
the various input conditions over the complete operating
range.
The duty cycle for a buck regulator operating in a continu-
ous conduction mode is given by:
D=
V
OUT
+ V
F
V
IN
- V
SAT
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
