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CS5150GD16 参数 Datasheet PDF下载

CS5150GD16图片预览
型号: CS5150GD16
PDF下载: 下载PDF文件 查看货源
内容描述: CPU 4位同步降压控制器 [CPU 4-Bit Synchronous Buck Controller]
分类和应用: 开关光电二极管控制器
文件页数/大小: 14 页 / 238 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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CS5150
Applications Information: continued
This protection feature results in less stress to the regulator
components, input power supply, and PC board traces
than occurs with constant current limit protection (see
Figures 10 and 11).
If the short circuit condition is removed, output voltage
will rise above the 1V level, preventing the FAULT latch
from being set, allowing normal operation to resume.
ed, resulting in a “crowbar” action to clamp the output
voltage and prevent damage to the load (see Figures 12 and
13). The regulator will remain in this state until the over-
voltage condition ceases or the input voltage is pulled low.
The bottom FET and board trace must be properly
designed to implement the OVP function.
Trace 4 - 5V Supply Voltage (2V/div.)
Trace 3 - Soft Start Timing Capacitor (1V/div.)
Trace 2 - Inductor Switching Node (2V/div.)
Trace 4 = 5V from PC Power Supply (5V/div.)
Trace1 = Regulator Output Voltage (1V/div.)
Trace 2 = Inductor Switching Node (5V/div.)
Figure 10: CS5150 demonstration board hiccup mode short circuit pro-
tection. Gate pulses are delivered while the soft start capacitor charges,
and cease during discharge.
Figure 12: OVP response to an input-to-output short circuit by immedi-
ately providing 0% duty cycle, crow-barring the input voltage to
ground.
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 1 = Regulator Output Voltage (1V/div.)
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 2 = Inductor Switching Node (2V/div.)
Figure 13: OVP response to an input-to-output short circuit by pulling
the input voltage to ground.
Figure 11: Startup with regulator output shorted.
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V
2
™ control topology and requires
no additional external components. The control loop
responds to an overvoltage condition within 100ns, causing
the top MOSFET to shut off, disconnecting the regulator
from its input voltage. The bottom MOSFET is then activat-
External Output Enable Circuit
On/off control of the regulator can be implemented
through the addition of two additional discrete compo-
nents (see Figure 14). This circuit operates by pulling the
soft start pin high, and the V
FFB
pin low, emulating a short
circuit condition.
9