CS4222
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE (I
2
C)
(Continued)
Parameter
I
2
C Mode
SCL Clock Frequency
RST Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
(Note 11)
Symbol
f
scl
t
irs
t
buf
t
hdst
t
low
t
high
t
sust
t
hdd
t
sud
t
r
t
f
t
susp
Min
-
500
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.7
Max
100
-
-
-
-
-
-
-
-
1
300
-
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
Notes: 11. Data must be held for sufficient time to bridge the transition time, t
fc
, of SCL.
RST
t
S to p
irs
S t a rt
R e p e a te d
S t a rt
t rd
t fd
S to p
SDA
t
b uf
t
h dst
t
high
t
h d st
t fc
t susp
SCL
t
t
t su d
t a ck
t su st
t rc
lo w
hd d
Figure 3. Control Port Timing - I
2
C Mode
DS236F1
11
CIRRUS [ CIRRUS LOGIC ]
