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CS4922-CL 参数 Datasheet PDF下载

CS4922-CL图片预览
型号: CS4922-CL
PDF下载: 下载PDF文件 查看货源
内容描述: MPEG / G.729A音频解码器系统 [MPEG/G.729A AUDIO DECODER SYSTEM]
分类和应用: 解码器
文件页数/大小: 34 页 / 644 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS4922
6 POWER SUPPLY AND GROUNDING
When using separate supplies, the digital power
should be connected to the CS4922 via a ferrite
bead, positioned closer than 1" to the device (see
Figure 18). The CS4922 VA+ pin should be de-
rived from the cleanest power source available. If
only one supply is available, use the suggested ar-
rangement in Figure 1.
The CS4922 should be positioned such that the an-
alog pins (pins 29 - 39) are over the analog ground
plane, while the rest of the pins lay over the digital
ground plane as illustrated in Figures 18 and 19.
The analog and digital grounds on the CS4922 are
not connected internally; this should be accom-
plished externally through a point-to-point connec-
tion across the ground split as shown in Figure 18.
A separate power plane for the chip is preferable.
Figure 19 illustrates the optimum ground and de-
coupling layout for the CS4922 assuming a sur-
face-mount socket and surface mount capacitors.
Surface-mount sockets are useful since the pad lo-
cations are exactly the same as the actual chip;
therefore, given that space for the socket is left on
the board, the socket can be optional for produc-
tion. Figure 19 depicts mostly the top layer contain-
ing signal traces and assumes the bottom or inter-
layer contains a solid ground plane (analog or dig-
ital), except where the digital supply needs to run to
the power pins. The important points with regards
to this diagram are that the ground plane is SOLID
under the CS4922 and connects all ground pins
with thick traces providing the absolute lowest im-
pedance between ground pins. The decoupling ca-
pacitors are placed as close as possible to the
device which, in this case, is the socket boundary.
The lowest value capacitor is placed closest to the
chip. Vias are placed near the AGND and DGND
pins, under the IC, and should be attached to the
solid ground plane (analog or digital) on another
layer. The negative side of the decoupling capaci-
tors should also attach to the same solid ground
plane. Traces bringing the power to the CS4922
should be wide thereby keeping the impedance
low.
If using through-hole sockets, effort should be
made to find a socket with the minimum height
which will minimize the socket impedance. When
using a through-hole socket, the vias under the chip
in Figure 19 are not needed since the pins serve the
same function.
>
1/8"
Digital
Ground
Plane
Ground
Connection
Ferrite
Bead
+5V
Analog
Supply
Analog
Ground
Plane
Note that the CS4922
is oriented with its
digital pins towards the
digital end of the board.
CS4922
Digital Interface
Analog Signals &
Components
Figure 18. CS4922 Suggested Layout
24