CS5343/4
SYSTEM CLOCKING AND SERIAL AUDIO INTERFACE
Logic “0” = GND = 0 V; Logic “1” = VA, C
L
= 20 pF.
Parameter
Master Mode
MCLK Period
(Double-Speed, 384x Mode)
(Double-Speed, 192x Mode)
(Double-Speed, 256x Mode)
(Double-Speed, 128x Mode)
(Single-Speed, 768x Mode)
(Single-Speed, 384x Mode)
(Single-Speed, 512x Mode)
(Single-Speed, 256x Mode)
MCLK Duty Cycle
Output Sample Rate
LRCK Duty Cycle
SCLK Duty Cycle
SDOUT valid before SCLK rising
SDOUT valid after SCLK rising
SCLK falling to LRCK edge
t
stp
t
hld
t
slrd
(Double-Speed, 384x Mode)
(Double-Speed, 192x Mode)
(Double-Speed, 256x Mode)
(Double-Speed, 128x Mode)
(Single-Speed, 768x Mode)
(Single-Speed, 384x Mode)
(Single-Speed, 512x Mode)
(Single-Speed, 256x Mode)
MCLK Duty Cycle
Input Sample Rate
LRCK Duty Cycle
SCLK Period
SCLK Duty Cycle
SDOUT valid before SCLK rising
SDOUT valid after SCLK rising
SCLK falling to LRCK edge
t
stp
t
hld
t
slrd
t
sclkw
(Single-Speed)
(Double-Speed)
Fs
t
clkw
(Single-Speed)
(Double-Speed)
Fs
t
clkw
24
48
36
72
24
48
36
72
40
4
86
-
-
10
40
-20
-
-
-
-
-
-
-
-
50
-
-
50
50
-
-
-
30
60
45
90
325
651
488
976
60
54
108
-
-
-
-
20
ns
ns
ns
ns
ns
ns
ns
ns
%
kHz
kHz
%
%
ns
ns
ns
Symbol
Min
Typ
Max
Unit
Slave Mode
MCLK Period
24
48
36
72
24
48
36
72
40
4
86
40
1 -
-----------------
64
×
Fs
45
10
40
-20
-
-
-
-
-
-
-
-
50
-
-
50
-
50
-
-
-
30
60
45
90
325
651
488
976
60
54
108
60
-
55
-
-
20
ns
ns
ns
ns
ns
ns
ns
ns
%
kHz
kHz
%
ns
%
ns
ns
ns
10
DS687F1