欢迎访问ic37.com |
会员登录 免费注册
发布采购

CS5340-CZZ 参数 Datasheet PDF下载

CS5340-CZZ图片预览
型号: CS5340-CZZ
PDF下载: 下载PDF文件 查看货源
内容描述: 101分贝192千赫,多比特音频A / D转换器 [101 dB, 192 kHz, Multi-Bit Audio A/D Converter]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 22 页 / 385 K
品牌: CIRRUS [ CIRRUS LOGIC ]
 浏览型号CS5340-CZZ的Datasheet PDF文件第2页浏览型号CS5340-CZZ的Datasheet PDF文件第3页浏览型号CS5340-CZZ的Datasheet PDF文件第4页浏览型号CS5340-CZZ的Datasheet PDF文件第5页浏览型号CS5340-CZZ的Datasheet PDF文件第6页浏览型号CS5340-CZZ的Datasheet PDF文件第7页浏览型号CS5340-CZZ的Datasheet PDF文件第8页浏览型号CS5340-CZZ的Datasheet PDF文件第9页  
Confidential Draft
3/11/08
CS5340
101 dB, 192 kHz, Multi-Bit Audio A/D Converter
Features
Advanced Multi-bit Delta-Sigma Architecture
24-bit Conversion
Supports All Audio Sample Rates Including
192 kHz
101 dB Dynamic Range at 5 V
-94 dB THD+N
90 mW Power Consumption
High-Pass Filter to Remove DC Offsets
Analog/Digital Core Supplies from 3.3 V to 5 V
Supports Logic Levels between 1.8 V and 5 V
Auto-detect Mode Selection in Slave Mode
Auto-Detect MCLK Divider
Pin Compatible with CS5341
General Description
The CS5340 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering, generating
24-bit values for both left and right inputs in serial form
at sample rates up to 200 kHz per channel.
The CS5340 uses a 5th-order, multi-bit Delta-Sigma
modulator followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The CS5340 is available in a 16-pin TSSOP package
for Commercial (-10° to +70° C) and Automotive grades
(-40° to +85° C). The CDB5340 Customer Demonstra-
tion Board is also available for device evaluation and
implementation suggestions. Please refer to
for complete ordering
information.
The CS5340 is ideal for audio systems requiring wide
dynamic range, negligible distortion and low noise, such
as set-top boxes, DVD-karaoke players, DVD record-
ers, A/V receivers, and automotive applications.
VA
3.3 V to 5 V
VD
3.3 V to 5 V
VL
1.8 V to 5 V
Single-Ended
Analog Input
AINL
Switch-Cap
ADC
High-Pass
Filter
Low-Latency
Digital Filters
Auto-detect
MCLK Divider
Master Clock
FILT+
Serial Port
VQ
Internal
Reference
Voltages
Slave Mode
Auto-detect
SCLK
LRCK
SDOUT
M0
M1
Single-Ended
Analog Input
AINR
Switch-Cap
ADC
High-Pass
Filter
Low-Latency
Digital Filters
Mode
Configuration
Reset
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
March '08
DS601F2