CS5521/22/23/24/28
16-bit or 24-bit, 2/4/8-channel ADCs with PGIA
Features
Low Input Current (100 pA), Chopper-
stabilized Instrumentation Amplifier
Scalable Input Span (Bipolar/Unipolar)
-
2.5V VREF: 25 mV, 55 mV, 100 mV, 1 V,
2.5 V, 5 V
-
External: 10 V, 100 V
General Description
The CS5521/22/23/24/28 are highly integrated
∆Σ
ana-
log-to-digital converters (ADCs) which use charge-
balance techniques to achieve 16-bit (CS5521/23) and
24-bit (CS5522/24/28) performance. The ADCs come as
either
two-channel
(CS5521/22),
four-channel
(CS5523/24), or eight-channel (CS5528) devices and
include a low-input-current, chopper-stabilized instru-
mentation amplifier. To permit selectable input spans of
25 mV, 55 mV, 100 mV, 1 V, 2.5 V, and 5 V, the ADCs
include a PGA (programmable gain amplifier). To ac-
commodate ground-based thermocouple applications,
the devices include a charge pump drive which provides
a negative bias voltage to the on-chip amplifiers.
These devices also include a fourth-order
∆Σ
modulator
followed by a digital filter which provides eight selectable
output word rates. The digital filters are designed to settle
to full accuracy within one conversion cycle and when
operated at word rates below 30 Sps, they reject both
50 Hz and 60 Hz interference.
These single-supply products are ideal solutions for
measuring isolated and non-isolated, low-level signals in
process control applications.
Wide V
REF
Input Range (+1 to +5 V)
Fourth Order Delta-Sigma A/D Converter
Easy to Use Three-wire Serial Interface Port
-
Programmable/Auto Channel Sequencer with
Conversion Data FIFO
-
Accessible Calibration Registers per Channel
-
Compatible with SPI™ and Microwire™
System and Self Calibration
Eight Selectable Word Rates
-
Up to 617 Sps (XIN = 200 kHz)
-
Single Conversion Settling
-
50/60 Hz ±3 Hz Simultaneous Rejection
Single +5 V Power Supply Operation
-
Charge Pump Drive for Negative Supply
-
+3 to +5 V Digital Supply Operation
Low Power Consumption: 6.0 mW
VA+
AGND
ORDERING INFORMATION
See page 52.
VREF+ VREF-
X1
DGND
VD+
Programmable
Gain
AIN1+
AIN1-
AIN2+
AIN2-
AIN3+
AIN3-
AIN4+
AIN4-
NBV
CPD
MUX
CS5524
Shown
X1
+
X20
X1
Differential
4
th
Order
Modulator
Digital Filter
∆Σ
Controller,
Setup Registers,
&
Channel Scan
Logic
CS
Serial Port
Interface
SCLK
SDI
SDO
Latch
Clock
Gen.
Data FIFO &
Calibration Registers
A0 A1
XIN XOUT
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
JUL ‘08
DS317F6
CIRRUS [ CIRRUS LOGIC ]
