3/25/08
3.7 Typical Connection Diagrams
CS5566
The following figure depicts the CS5566 powered from bipolar analog supplies, +2.5 V and - 2.5 V.
4700pF
C0G
R
1
C
1
49.9
CS5566
AIN+
+2.048 V
0V
-2.048 V
+2.048 V
0V
-2.048 V
47pF
4.99k
4.99k
R
1
C
1
49.9
47pF
4.99k
4.99k
SMODE
CS
5
SCLK
5
AIN-
4700pF
C0G
SDO
RDY
(V+) Buffers On
+2.5 V
(V-) Buffers Off
+4.096
Voltage
Reference
(NOTE 1)
VREF+
10
µF
0.1
µF
CONV
BUFEN
BP/UP
SLEEP
RST
50
MCLK
VREF-
-2.5 V
TST
+2.5 V
+3.3 V to +1.8 V
V1+
10
0.1
µF
VL
V2+
47
µF
0.1
µF
10
0.1
µF
V2-
0.1
µF
X7R
DCR
VLR2
V1-
-2.5 V
VLR
NOTES
1. See Section 3.3 Voltage Reference for information on required
voltage reference performance criteria.
2.Locate capacitors so as to minimize loop length.
3. The ±2.5 V supplies should also be bypassed to ground at the converter.
4. VLR and the power supply ground for the ±2.5 V should be
connected to the same ground plane under the chip.
5. SCLK and SDO may require pull-down resistors in some applications.
6. An RC input filter can be used to band limit the input to reduce noise.
Select R to be equal to the parallel combination of the feedback of the
feedback resistors 4.99k || 4.99k = 2.5k0
0
Figure 8. CS5566 Configured Using
±
2.5V Analog Supplies
18
DS806PP1