CS8420
10.2 Miscellaneous Control 1 (01h)
7
6
5
4
3
2
1
0
SWCLK
VSET
MUTESAO
MUTEAES
DITH
INT1
INT0
TCBLD
SWCLK
Causes OMCK to be output through the RMCK pin when the PLL is unlocked
0 - RMCK is driven by the PLL VCO (default)
1 - OMCK is switched to output through the RMCK pin when the PLL is unlocked. Circuitry driv-
en by the PLL is driven by OMCK.
VSET
Transmitted V bit level
0 - Transmit a 0 for the V bit, indicating that the data is valid, and is normally linear PCM audio
(default)
1 - Transmit a 1 for the V bit, indicating that the data is invalid or is not linear PCM audio data
MUTESAO
MUTEAES
DITH
Mute control for the serial audio output port
0 - Normal output (default)
1 - Mute the serial audio output port
Mute control for the AES3 transmitter output
0 - Normal output (default)
1 - Mute the AES3 transmitter output
Dither Control
0 - Triangular PDF dither applied to output data. The level of the dither is automatically adjusted
to be appropriate for the output word length selected by the SORES bits (default)
1 - No dither applied to output data.
INT[1:0]
TCBLD
Interrupt (INT) output pin control
00 - Active high, high output indicates an interrupt condition has occurred (default)
01 - Active low, low output indicates an interrupt condition has occurred
10 - Open drain, active low. This setting requires an external pull up resistor on the INT pin.
11 - Reserved
Transmit Channel Status Block pin (TCBL) direction specifier
0 - TCBL is an input (default)
1 - TCBL is an output
34
DS245F4
CIRRUS [ CIRRUS LOGIC ]
