EP9312 Data Sheet
FEATURES
•
200-MHz ARM920T Processor
• 16-kbyte Instruction Cache
• 16-kbyte Data Cache
•
•
•
Linux
®
, Microsoft
®
Windows
®
CE-enabled MMU
100-MHz System Bus
•
•
•
Universal Platform
System-on-chip Processor
IrDA Interface
8 x 8 Keypad Scanner
One Serial Peripheral Interface (SPI) Port
MaverickCrunch
™
Math Engine
• Floating Point, Integer, and Signal Processing
Instructions
• Optimized for digital music compression and
decompression algorithms.
• Hardware interlocks allow in-line coding.
MaverickKey
™
IDs
• 32-bit unique ID can be used for DRM-compliant,
128-bit random ID.
Integrated Peripheral Interfaces
• 32-bit SDRAM Interface (up to 4 banks)
• 32/16-bit SRAM / FLASH / ROM
• Serial EEPROM Interface
• EIDE (up to 2 devices)
• 1/10/100 Mbps Ethernet MAC
• Three UARTs
• Three-port USB 2.0 Full-speed Host (OHCI)
(12 Mbits per second)
• LCD and Raster Interface
• Touchscreen Interface with ADC
•
•
•
•
• 6-channel or 2-channel Serial Audio Interface (I
2
S)
• 2-channel, Low-cost Serial Audio Interface (AC'97)
• 2 High-resolution PWMs (16 bits each)
Internal Peripherals
• 12 Direct Memory Access (DMA) Channels
• Real-time Clock with Software Trim
• Dual PLL controls all clock domains.
• Watchdog Timer
• Two General-purpose 16-bit Timers
• One General-purpose 32-bit Timer
• One 40-bit Debug Timer
• Interrupt Controller
• Boot ROM
Package
• 352 pin PBGA
COMMUNICATIONS PORTS
Serial
Audio
Interface
Peripheral Bus
Clocks &
Timers
USER INTERFACE
12
DMA w/
CHANNEL
CRC
DMA
(3) UARTs
w/
IrDA
MaverickCrunch
TM
ARM920T
Interrupts
& GPIO
MaverickKey
TM
MaverickLock
TM
D-Cache
16KB
I-Cache
16KB
Bus
Bridge
(3) USB
Hosts
Boot
ROM
MMU
Keypad &
Touch
Screen I/F
Processor Bus
Ethernet
MAC
EIDE
I/F
SRAM &
Flash I/F
Unified
SDRAM I/F
Video/LCD
Controller
MEMORY AND STORAGE
©
Copyright 2005 Cirrus Logic (All Rights Reserved)
MAR ‘05
DS515PP7
1
CIRRUS [ CIRRUS LOGIC ]
