P
PA61M/883
i o n
F
F
r
r
o
o
m
r o d u c t
I
I
n n o v a
t
nnova
m
PA61M/883
PA61M/883
TEST CONDITIONS
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0
V
IN
= 0
V
IN
= 0
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0
V
IN
= 0
V
IN
= 0
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0, A
V
= 100
V
IN
= 0
V
IN
= 0
V
IN
= 0
R
L
= 1Ω
R
L
= 500Ω
R
L
= 6Ω
R
L
= 6Ω, R
CL
= 1Ω
R
L
= 500Ω, A
V
= 1, C
L
= 10nF
R
L
= 500Ω
R
L
= 500Ω, F = 10Hz
R
L
= 500Ω, F = DC, V
CM
= ±9V
R
L
= 1Ω
R
L
= 500Ω
R
L
= 6Ω
R
L
= 500Ω, A
V
= 1, C
L
= 10nF
R
L
= 500Ω
R
L
= 500Ω, F = 10Hz
R
L
= 500Ω, F = DC, V
CM
= ±9V
R
L
= 1Ω
R
L
= 500Ω
R
L
= 6Ω
R
L
= 500Ω, A
V
= 1, C
L
= 10nF
R
L
= 500Ω
R
L
= 500Ω, F = 10Hz
R
L
= 500Ω, F = DC, V
CM
= ±9V
10
40
24
.56
1
96
74
10
40
24
1
96
74
8
40
24
1
96
74
1
10
1
10
MIN
MAX
10
±6
±10.4
±8.6
±30
±30
±30
10
±11.2
±15.6
±13.8
±115
±115
±115
15
±12.5
±16.9
±15.1
±70
±70
±70
UNITS
mA
mV
mV
mV
nA
nA
nA
mA
mV
mV
mV
nA
nA
nA
mA
mV
mV
mV
nA
nA
nA
V
V
V
A
mV
V/µs
dB
dB
V
V
V
mV
V/µs
dB
dB
V
V
V
mV
V/µs
dB
dB
Table 4 Group A Inspection
SG
1
1
1
1
1
1
1
3
3
3
3
3
3
3
2
2
2
2
2
2
2
4
4
4
4
4
4
4
4
6
6
6
6
6
6
6
5
5
5
5
5
5
5
PARAMETER
Quiescent Current
Input Offset Voltage
Input Offset Voltage
Input Offset Voltage
Input Bias Current, +IN
Input Bias Current, –IN
Input Offset Current
Quiescent Current
Input Offset Voltage
Input Offset Voltage
Input Offset Voltage
Input Bias Current, +IN
Input BiasCurrent, –IN
Input Offset Current
Quiescent Current
Input Offset Voltage
Input Offset Voltage
Input Offset Voltage
Input Bias Current, +IN
Input Bias Current, –IN
Input Offset Current
Output Voltage, I
O
= 10A
Output Voltage, I
O
= 80mA
Output Voltage, I
O
= 4A
Current Limits
Stability/Noise
Slew Rate
Open Loop Gain
Common Mode Rejection
Output Voltage, I
O
= 10A
Output Voltage, I
O
= 80mA
Output Voltage, I
O
= 4A
Stability/Noise
Slew Rate
Open Loop Gain
CommonMode Rejection
Output Voltage, I
O
= 8A
Output Voltage, I
O
= 80mA
Output Voltage, I
O
= 4A
Stability/Noise
Slew Rate
Open Loop Gain
Common Mode Rejection
SYMBOL
I
Q
V
OS
V
OS
V
OS
+I
B
–I
B
I
OS
I
Q
V
OS
V
OS
V
OS
+I
B
–I
B
I
OS
I
Q
V
OS
V
OS
V
OS
+I
B
–I
B
I
OS
V
O
V
O
V
O
I
CL
E
N
SR
A
OL
CMR
V
O
V
O
V
O
E
N
SR
A
OL
CMR
V
O
V
O
V
O
E
N
SR
A
OL
CMR
100Ω
+15V
100Ω
5
3
2
U.U.T.
4
6
–15V
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
TEMP. POWER
25°C
25°C
25°C
25°C
25°C
25°C
25°C
–55°C
–55°C
–55°C
–55°C
–55°C
–55°C
–55°C
125°C
125°C
125°C
125°C
125°C
125°C
125°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
–55°C
–55°C
–55°C
–55°C
–55°C
–55°C
–55°C
125°C
125°C
125°C
125°C
125°C
125°C
125°C
±32V
±32V
±10V
±45V
±32V
±32V
±32V
±32V
±32V
±10V
±45V
±32V
±32V
±32V
±32V
±32V
±10V
±45V
±32V
±32V
±32V
±17V
±45V
± 30V
±15V
±32V
±32V
±32V
±15V
±17V
±45V
±30V
±32V
±32V
±32V
±15V
±15V
±45V
±30V
±32V
±32V
±32V
±15V
.88
1
10
BURN IN CIRCUIT
*
1Ω
These components are used to stabilize device
due to poor high frequency characteristics of
burn in board.
**
*
*
1
20Ω
1Ω
** Input signals are calculated to result in internal
power dissipation of approximately 2.1W at case
temperature = 125°C.
PA61MU
http://www.cirrus.com
SEP 2009
1
APEX − PA61MUREVG