1200/2400/4800 Baud FFSK/MSK Modem
CMX469A
1.3
D3
Signal List
CMX469A
E2
P6
Signal
Description
Pin
No.
1
Pin
No.
1
Pin
No.
1
Name
Type
CLOCK/XTAL
I/P
The input to the on-chip inverter, for use with
either a 1.008MHz or a 4.032MHz Xtal or an
external clock. Clock frequency selection is by
means of the CLOCK RATE pin. This affects the
operational data rate of the device. Operation of
any CML microcircuit without a Xtal or clock
input may cause device damage.
The output of the on-chip inverter.
A squarewave, produced on-chip, to
synchronize the input of logic data and
transmission of the FFSK/MSK signal.
When the transmitter is enabled, this pin outputs
the FFSK/MSK signal. With the transmitter
disabled, this pin is set to a high-impedance
state.
The serial logic data to be transmitted is input to
this pin.
A logic ‘0’ will enable the transmitter. A logic ‘1’ at
this input will put the transmitter into powersave
whilst forcing Tx SYNC OUTPUT to a logic ‘1’
and Tx SIGNAL OUTPUT to a high-impedance
state. This pin is internally pulled to V
DD
.
2
3
2
3
2
3
XTALN
Tx SYNC O/P
O/P
O/P
4
5
5
Tx SIGNAL
O/P
O/P
5
6
7
8
6
7
Tx DATA I/P
Tx ENABLEN
I/P
I/P
7
9
8
BANDPASS
O/P
Rx ENABLE
V
BIAS
O/P
The output of the Rx Bandpass Filter. This output
impedance is typically 10k
Ω
and may require
buffering prior to use.
The control of the Rx function
The output of the on-chip analogue bias circuitry.
Held internally at V
DD
/2, this pin should be
decoupled to V
SS
by a capacitor (C2). This bias
voltage is maintained under all powersave
conditions.
8
9
10
11
9
10
I/P
BI
10
11
12
12
13
14
11
12
13
V
SS
UNCLOCKED
DATA O/P
CLOCKED
DATA O/P
PWR
O/P
O/P
Negative supply rail (GND).
The recovered asynchronous serial data output
from the receiver.
The recovered synchronous serial data output
from the receiver. Data is latched out by the
recovered clock, available at the Rx SYNC O/P.
©
2001 Consumer Microcircuits Limited
5
D/469A/2
CMLMICRO [ CML MICROCIRCUITS ]
