FRS Signalling Processor
CMX882
1.3
Signal List
Signal
Name
V
DD
(D)
Type
Power
The digital positive supply rail.
This pin should be
decoupled to VSS(D) by a capacitor mounted close to the
device pins.
The negative supply rail (digital ground).
The analogue positive supply rail. Levels and thresholds
within the device are proportional to this voltage. This pin
should be decoupled to VSS(A) by a capacitor mounted
close to the device pins.
The negative supply rail. Both pins must be connected to
analogue ground.
No connection should be made to these pins.
A 'wire-ORable' output for connection to the Interrupt
Request input of the host. This output is pulled down to
V
SS
(D) when active and is high impedance when inactive.
An external pull-up resistor is required.
The C-BUS serial data output to the host. This output is
held at high impedance when not sending data to the host.
The C-BUS serial clock input from the host.
The C-BUS serial data input from the host.
The C-BUS data loading control function. Data transfer
sequences are initiated, and completed by the CSN signal.
Description
Package
D6, E1
Pin No.
23
5
18
V
SS
(D)
V
DD
(A)
Power
Power
9, 21
1, 2
3
V
SS
(A)
Power
NC
IRQN
O/P
4
6
7
8
REPLY_DATA
SERIAL_CLOCK
CMD_DATA
CSN
T/S
I/P
I/P
I/P
2004 CML Microsystems Plc
9
D/882/7
CMLMICRO [ CML MICROCIRCUITS ]
