Application Information
V
DD
C
4
R
2
X
1
C
5
C
6
V
SS
2
1
V
SS
XTAL/CLOCK
XTAL
1
2
3
16
V
DD
R
1
15
14
DATA OUT
CHIP SELECT
SERIAL CLOCK INPUT
IRQ
V
BIAS
C
2
LEVEL IN
SIGNAL IN
C
1
C
3
4
5
6
7
FX613DW
13
12
11
10
9
AUDIO SIGNAL
V
SS
8
V
SS
Notes
(1) The Xtal/Clock input may be driven from the host telephone
system's 3.579545MHz clock; if a Xtal drive is required, the
configuration shown
INSET
is recommended.
(2) The audio signal should be input to both Signal In and Level In pins
via separate coupling capacitors. If it is wished to operate the
device with disregard to on-chip level thresholds and permanently
enable the FX613, the Level In pin should be held at V
DD
.
To disable the FX613 the Level In pin should be held at V
SS
. Level
thresholds are preset internally.
Component
R
1
R
2
C
1
C
2
C
3
C
4
C
5
C
6
X
1
Value
22.0kΩ
1.0MΩ
0.01µF
0.1µF
1.0µF
1.0µF
33.0pF
33.0pF
3.579545MHz
Tolerances: C = ± 20% R = ± 10%
Fig.2 External Component Connections
V
DD
0
-10
775mVrms
Level (dB)
-20
-30
-40
-50
Low Band
(LO)
Must
Decode
High Band
(HI)
Must-Not
Decode
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
Frequency (Hz)
Fig.3 HI/LO Decode Bands
3