Controlling Protocol ......
“Write to Control Register”
– A/C 70
H
(78
H
), followed by 1 byte of Command Data.
Table 3 (below) shows the configurations available to the FX805. Bits 5, 6 and 7 are used together to Enable and Powersave
circuit sections as required.
Setting
MSB
7
0
0
0
0
1
1
1
1
Control Bits
Transmitted First
6
0
0
1
1
0
0
1
1
5
0
1
0
1
0
1
0
1
Functions Enabled
CTCSS Decoder
NRZ Decoder
CTCSS Encoder
NRZ Encoder
CTCSS Encoder and Decoder
NRZ Encoder and CTCSS Decoder
NRZ Decoder and CTCSS Decoder
NRZ Decoder
Functions Powersaved
NRZ Decoder and Both Encoders
CTCSS Decoder and Both Encoders
All Decoders
All Decoders
NRZ Encoder and Decoder
None
All Encoders
All Encoders (except Tx Sub-Audio LPF)
and CTCSS Decoder
4
1
0
3
1
0
2
1
0
1
1
0
0
1
0
Enable Audio Output – Used with Bit 3
Disable Audio Output – Output to V
BIAS
Enable Sub-Audio Bandstop Filter (Audio Signal Path)
By-pass Sub-Audio Bandstop Filter
Enable All FX805 Interrupts
Disable All FX805 Interrupts
Set Rx Lowpass Filter bandwidth to 180Hz – For low CTCSS Tones or NRZ Data
Set Rx Lowpass Filter bandwidth to 260Hz
All Encoders and Decoders Powersaved (Powersave All)
All Encoders and Decoders Enabled unless individually Powersaved
Table 3 Control Register
General Reset
Upon Power-Up the “bits” in the FX805 registers will be
random (either “0” or “1”). A General Reset Command (01
H
)
will be required to “reset” all microcircuits on the
“C-BUS,” and has the following effect upon the FX805.
Glossary of Abbreviations
Below is a list of abbreviations used within this Data Sheet.
CDCS
CTCSS
DPL
™
LTR
™
NRZ
f
CO
f
CTCSS IN
f
CTCSS OUT
f
TONE
f
XTAL
R
NRZ Rx
R
NRZ Tx
S
INPUT
Continuous Digitally Coded Squelch
Continuous Tone Controlled Squelch
Digital Private Line
Logic Trunked Radio
Non-Return-to-Zero data levels
Filter cut-off frequency
Sub-Audio Rx frequency
Sub-Audio Tx frequency
Tone frequency
Xtal/clock frequency
NRZ Rx baud rate
NRZ Tx baud rate
Audio input signal
Control Register
Status Register
N
OTONE
Timer
Set as 00
H
Set as 00
H
Discharged
Warning
– The following FX805 register configurations are
not affected by a General Reset command:
CTCSS Rx Frequency
CTCSS Tx Frequency/NRZ Baud Rate Register
NRZ Rx Data Register
NRZ Tx Data Register
Gain-Set Register
Note that setting the Control Register in this way (General
Reset) will set the FX805 to the CTCSS Decode mode and
overwrite a “Powersave All” instruction.
It should also be considered that a General Reset
command will reset ALL DBS 800 microcircuits operating on
the “C-BUS.”
7
CMLMICRO [ CML MICROCIRCUITS ]
