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MX929BDS 参数 Datasheet PDF下载

MX929BDS图片预览
型号: MX929BDS
PDF下载: 下载PDF文件 查看货源
内容描述: 数据公报4级FSK调制解调器数据泵 [DATA BULLETIN 4-Level FSK Modem Data Pump]
分类和应用: 调制解调器电信集成电路电信电路光电二极管
文件页数/大小: 51 页 / 616 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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COMMUNICATION SEMICONDUCTORS
MX929B
4-Level FSK Modem Data Pump
PRELIMINARY INFORMATION
DATA BULLETIN
Features
x
4-Level Root Raised Cosine FSK Modulation
x
Half Duplex, 4800 to 19.2kbps
x
Increase Channel Bit Rate/Hz
x
Full Data Packet Framing
x
Impulse and NRZ Signal Modes
x
Enhanced Performance in Noisy Conditions
x
Error Detection and Error Correction
x
Low Power 3.3V/5.0V Operation
Applications
x
RD-LAP¥ Systems
¥
x
RCR STD-47 Systems
x
Two Way Paging Systems
x
Mobile Data Systems
x
Wireless Telemetry
x
DataTAC¥ Terminals
¥
x
Portable Wireless Data Equipment
RADIO
MODULATOR
RF
DISCRIMINATOR
ANALOG RX
ANALOG TX
MX929B
MODEM
DATA
PUMP
DATA AND
CONTROL BUS
HOST
µ
C
SYSTEM
APPLICATION
PROCESSING
The MX929B is a low voltage CMOS device containing all of the baseband signal processing and Medium
Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data
Modem. It interfaces with the modem host
PC
and the radio modulation/demodulation circuits to deliver
reliable two-way transfer of the application data over a wireless link.
The MX929B assembles application data received from the host
PC,
adds forward error correction (FEC) and
error detection (CRC) information, and interleaves the result for burst-error protection. After automatically
adding symbol and frame sync codewords, the data packet is converted into filtered 4-level analog signals for
modulating the radio transmitter.
In receive mode, the MX929B performs the reverse function using the analog signals from the receiver
discriminator. After error correction and removal of the packet overhead, the recovered application data is
supplied to the host
PC.
CRC detected residual uncorrected data errors will be flagged. Readout of the SNR
value during receipt of a packet is also provided.
The MX929B uses data block sizes and FEC/CRC Algorithms that are compatible with RD-LAP¥ and
RCR STD-47 over-air-standards. The device is programmable to operate at standard bit rates from a wide
range of Xtal/clock frequencies.
The MX929B may be used with a 3.0V to 5.5V power supply and is available in the following package styles:
24-pin SSOP (MX929BDS), 24-pin SOIC (MX929BDW), and 24-pin PDIP (MX929BP).
©2001 MX-COM, INC.
www.mxcom.com Tel: 800 638 5577 336 744 5050
Fax: 336 744 5054
Doc. # 20480171.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.