Bt8370/8375/8376
3.8 Receiver Registers
RLOFD–RLOFA
Fully Integrated T1/E1 Framer and Line Interface
RX Reframe Criteria—Determines the number of frame errors the online framer must detect
before declaring a loss of frame alignment [ALM1; addr 047]. Refer to the Receive Framer
mode in [RFRAME; addr 001] (Table
to find which frame bits are monitored.
T1/E1N
0
0
1
1
1
NOTE:
RLOFD–A
0100
1100
0001
0010
0100
Reframe Criteria
3 Consecutive FAS or 915 CRC errors
3 Consecutive FAS Errors
2 out of 4 F-bit errors
2 out of 5 F-bit errors
2 out of 6 F-bit errors
Other RLOFD–RLOFA combinations are invalid. RAIS and
RLOF status is disabled if RLOFD–RLOFA equal all zeros.
RZCS
Receive B8ZS/HDB3 Zero Code Substitution (affects only BPV/LCV/EXZ counting)—When
set, the ZCS decoder does not include bipolar violations received as part of a B8ZS/HDB3
code in the LCV error count [addr 054, 055]. Otherwise, all bipolar violations are counted.
EXZ detection criteria is either 8 or 16 consecutive zeros, depending on the RZCS
configuration.
0 = ZCS decoder reports all occurrences of BPV;
also selects EXZ = 16 zeros
1 = ZCS decoder does not report BPVs received as part of ZCS;
also selects EXZ = 8 zeros
041—Receive Test Pattern Configuration (RPATT)
7
—
6
—
5
RESEED
4
BSTART
3
FRAMED
2
ZLIMIT
1
RPATT[1]
0
RPATT[0]
RESEED
Re-seed PRBS Sync Detector (auto clear)—If BSTART is active high, writing a one to
RESEED forces the PRBS sync detector to reseed and search for test pattern sync [PSYNC;
addr 00B]. The reseed and search algorithm remains active until a test pattern sync is found.
0 = no effect
1 = reseed and search for test pattern sync
When inverted data mode is selected, initiating RESEED [RPATT; addr 041] while
receiving all 1s will cause false pattern sync. In such cases, check receive slip buffers to see if
not all 1s is being received, then re-enable RESEED.
Enable PRBS Detector and Start Counting PRBS Bit Errors—BERR [addr 058, 059] counting
is enabled when BSTART is active high and a pattern sync is found [PSYNC=1; addr 00B];
otherwise, the BERR counter holds its present value until cleared by a processor read.
0 = PRBS detector disabled and BERR stops counting
1 = enable PRBS detector and BERR counter
BSTART
3-48
Conexant
N8370DSE
CONEXANT [ CONEXANT SYSTEMS, INC ]
