Bt8370/8375/8376
3.9 Performance Monitoring Registers
Fully Integrated T1/E1 Framer and Line Interface
058—PRBS Bit Error Counter LSB (BERR)
Reading BERR transfers the most recent 12-bit count from the internal PRBS error counter to BERR[11:0], and
clears the internal error counter without affecting the reported BERR[11:0] value. Subsequent reads of BERR
MSB [addr 059] report the BERR [11:8] count value latched when the BERR LSB was last read.
7
BERR[7]
6
BERR[6]
5
BERR[5]
4
BERR[4]
3
BERR[3]
2
BERR[2]
1
BERR[1]
0
BERR[0]
BERR[7:0]
BERR Count (applicable only for test pattern)
059—PRBS Bit Error Counter MSB (BERR)
15
0
14
0
13
0
12
0
11
BERR[11]
10
BERR[10]
9
BERR[9]
8
BERR[8]
BERR[11:8]
BERR Count (suspended if BSTART = 0)
05A—SEF/LOF/COFA Alarm Counter (AERR)
Reading AERR clears the SEF[1:0], COFA[1:0] and FRED[3:0] count values.
7
FRED[3]
6
FRED[2]
5
FRED[1]
4
FRED[0]
3
COFA[1]
2
COFA[0]
1
SEF[1]
0
SEF[0]
FRED[3:0]
Receive Loss of Frame Count—Increments for each occurrence of FRED [ALM3; addr 049].
The 4-bit count is large enough to count more than 100 ms of MFAS timeout intervals (8 ms
each) during E1 modes. The processor can therefore use the FRED counter overflow interrupt
to indicate that a receive MFAS alignment search has timed out.
Change of Frame Alignment Count—Increments each time the offline framer generates a
reframe pulse that aligns the receiver timebase to a new bit position. Applicable to T1 modes
only.
Severely Errored Frame Count—Increments for each occurrence of SEF [ALM3; addr 049].
COFA[1:0]
SEF[1:0]
3-60
Conexant
N8370DSE
CONEXANT [ CONEXANT SYSTEMS, INC ]
