Detailed Feature Summary
Frame Alignment
•
Framed formats:
– Independent transmit and receive
framing modes
– T1: FT/SF/ESF/SLC/T1DM/TTC-JT(J1)
– E1: FAS/MFAS/FAS+CAS/MFAS+CAS
Maximum Average Reframe Time
(MART) less than 50 ms
Transmitter alignment modes:
– Align to system bus data
– Align to system bus sync
– Align to buffer data (embedded
framing)
Unframed mode
Out-of-Service Testing
and Maintenance
•
Pseudo-Random Bit Sequence
(PRBS):
– Independent transmit and receive
– 2
11
; 2
15
; 2
20
; 2
23
patterns
– Framed or unframed mode
– Optional 7/14 zero limit
– Bit Error Counter (BERR)
Single error insertion:
– PRBS error
– Framing error
– CRC error
– BPV/LCV error (CX28394 and
CX28398 only)
– COFA error
In-Service
Performance Monitoring
•
•
One-second timer I/O to synchronize
reporting
Receive error detectors with
accumulators:
– Bipolar/Line Code Violations
(LCV) (CX28394 and CX28398
only)
– Excessive Zeros (EXZ)
– Loss of Frame (RLOF)
– Framing Errors (FERR)
– CRC Errors (CERR)
– Far End Block Errors (FEBE)
– Severely Errored Frames (SEF)
– Change of Frame Alignment
(COFA)
Transmit error detectors:
– Loss of Frame (TLOF)
– Framing Errors (TFERR)
– Multiframe Errors (TMERR)
– CRC Errors (TCERR)
– Loss of Transmit Clock (TLOC)
Receive alarm detectors:
– Alarm Indication Signal (AIS)
– Loss of Signal (RLOS)
– RAI/Yellow Alarm (YEL)
– Multiframe Yellow (MYEL)
– Lost Frame Alignment (FRED)
– Lost Multiframe Alignment
(MRED)
– Carrier Failure Alarm (CFA) with
8:1 dual slope integration
Controlled Frame Slip (RFSLIP)
Uncontrolled Frame Slip (RUSLIP)
Automatic and on-demand transmit
alarms:
– AIS following RLOS and/or TLOC
– Automatic AIS clock switching
– YEL following FRED
– YEL following 100ms reframe
timeout
– MYEL following MRED
– FEBE following CERR
•
•
•
•
Signaling
•
•
•
•
•
•
•
•
•
•
•
T1: 2-, 4-, or 16-state robbed bit
ABCD signaling
E1: Channel Associated Signaling
(CAS)
Common Channel Signaling (CCS) in
any time slot
Per-channel receive signaling stack
Signaling state change interrupt
Automatic and manual signaling
freeze
Debounce signaling (2-bit
integration)
UNICODE detection
Signaling reinsertion on PCM system
bus
Separate I/O for system bus signaling
Per-channel transparent
System Bus Interface (SBI)
•
System bus data rates:
– 1536 kbps (T1 without F-bits)
– 1544 kbps (T1)
– 2048 kbps (E1)
– 4096 kbps (2E1)
– 8192 kbps (4E1)
Clock operation at 1x or 2x data rate
Selectable I/O clock edges
Master, slave, or mixed bus timing
Bit and time slot frame sync offsets
DS0 drop/insert indicators for
external mux
Embedded T1 framing transport
per G.802
Receive and transmit slip buffers
– Bypass, 2-frame, or 64-bit depth
– Slip detection with directional
status
– Slip buffer phase status
– Per-channel idle code insertion
– Processor accessible data buffers
Direct connection to upper layer
devices:
– Link layer: Bt8474
– ATM layer: CN8228
Direct connection to physical line
interface
– CX28380
Supported system bus formats:
– ATT Concentration Highway
Interface (CHI)
– Multi-Vendor Integration Protocol
(MVIP)
– Mitel ST-bus
Separate or internally multiplexed
bus modes
•
•
•
•
•
•
•
•
•
•
•
Loopbacks
•
Remote loopback toward line
– Retains BPV transparency
(CX28394 and CX28398 only)
Payload loopback
Per-channel DS0 remote loopback
Local loopback towards system
– Framer digital loopback
– Per-channel DS0 local loopback
Inband loopback code detection/
generation
Simultaneous local and remote line
loopbacks
•
•
•
•
•
•
•
•
Processor Interface
•
•
•
•
•
Parallel 8-bit bus
Data strobes (Motorola) or address
latch enable (Intel)
Multiplexed or non-multiplexed
address/data bus
Synchronous or asynchronous
data transfers
Open drain interrupt output with
maskable sources
•
100054E
Conexant
CONEXANT [ CONEXANT SYSTEMS, INC ]
