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SCG2000 参数 Datasheet PDF下载

SCG2000图片预览
型号: SCG2000
PDF下载: 下载PDF文件 查看货源
内容描述: 同步时钟发生器 [Synchronous Clock Generators]
分类和应用: 时钟发生器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 20 页 / 523 K
品牌: CONNOR-WINFIELD [ CONNOR-WINFIELD CORPORATION ]
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SCG2000 Jitter Attenuation
Figure 12
Jitter Attenuation vs. Input Frequency
0.0
-5.0
-10.0
-15.0
-20.0
-25.0
-30.0
-35.0
-40.0
-45.0
1
10
100
INPUT Jitter frequency (Hz)
1000
Jitter attenuation (dB)
Figure 13
Typical System Test Setup
This device supplies system time
information. It can be thought of as
supplying "absolute time" reference
information
GPS or LORAN
Timing Source
Possible Choice :
Stanford Research Model: FS700
10
MHz
M T IE ( s
S a m p l e M T IE D ata fo r S T M -S 3 /M S T M -S 3
1. 0E -6
T yp ic al r es po n s e - 3 00 0 s ec on d te s t - J i tte r app lie d (2 U I @ 10 H z )
r e f d ate A P R 22 19 98
k dh
1 00. 0E -9
10. 0E -9
M TIE
1 2 4 4 - 5 .2 M a s k ( A )
1 2 4 4 - 5 .2 M a s k ( B )
1 2 4 4 - 5 .6 M a s k
G R 2 5 3 - 5 .4 .4 .3.2
1. 0E -9
1 0 0 .0 E - 3
1 . 0 E +0
1 0 .0 E +0
1 0 0 .0 E +0
1 . 0 E +3
1 0 . 0 E +3
Ob s e rv at io n Ti m e ( s )
C o p yr ig h t 1 99 8 Co n no r -W inf iel d all r i gh ts r e s er ve d
Target System Under Test
External
Reference
Input
Arbitrary
Waveform
Generator
DS1 rate RZ (1.544 MHz), E1 rate RZ or 8 kHz
clock RZ with noise modulation
Clock or BITS logic level
clock input (TTL, CMOS,
etc.)
Standards
Compliance
Documents
OC-12 Line Card
OC-48 Line Card
OC-3 Line Card
DS-1 Line Card
Timing Card
Timing Card
Line Card
MTIE, TDEV, Wander Transfer,
and Wander Generation Plots
S am p l e W an d e r G e n e r ati o n ( T D E V ) f or S T M / M S T M -S 3
1 .0 E - 6
Noise Modulation Input
10
MHz
T ypi cal r e s p on s e - 3 00 0 s ec o nd te s t - J i tter ap plie d (2 U I @ 10 H z )
r ef da te A P R 2 2 199 8
kdh
. . . . ...
1 0 0 .0 E - 9
1 0 .0 E - 9
T D E V (s e c
TD EV
1 .0 E - 9
External
Reference
Input
Arbitrary
Waveform
Generator
[Noise
Source]
GR 1 2 4 4 -Fi g 5 .1
GR 1 2 4 4 -Fi g 5 -3
1 0 0 . 0 E -1 2
1 0 .0 E - 3
1 0 0 .0 E - 3
1 . 0 E +0
1 0 .0 E +0
1 0 0 .0 E +0
1 . 0 E +3
I n te g r a ti o n Ti m e (s e c )
C o p yr ig ht 199 8 C o nn o r -Wi nfi eld a lll r ig hts r es e rv ed
DS1 rate [1.544 MHz] BITS Bipolar
DS-1, OC-3, OC-12 electrical or optical signals
10
MHz
Tektronix
SJ300E
10
MHz
Time-stamped ensemble
based on absolute time
reference (10MHz input)
Phase Error data output
External
Reference
Input
HP53310A
Modulation Analyzer / Time Interval Analyzer
Wander Analyzer data (IEEE-488)
External
Reference
Input
TEKTRONIX SJ300E
IEEE-488 Controller
Platform for software
HP 53305A Phase Analyzer
HP E1748A Sync
Measurement
Tektronix Wander Analyzer
Data Sheet #:
SG029
Page 10
of
20
Rev:
A04
Date:
01 / 29 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice