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0603ESDA2-TR2 参数 Datasheet PDF下载

0603ESDA2-TR2图片预览
型号: 0603ESDA2-TR2
PDF下载: 下载PDF文件 查看货源
内容描述: 0603ESDA2 - TR2 ESD抑制器PolySurg系列 [0603ESDA2-TR2 ESD Suppressor PolySurg Series]
分类和应用:
文件页数/大小: 2 页 / 400 K
品牌: COOPER [ COOPER BUSSMANN, INC. ]
 浏览型号0603ESDA2-TR2的Datasheet PDF文件第2页  
0603ESDA2-TR2 ESD Suppressor
PolySurg
Series
Applications
Computers and peripherals
Blu-Ray/DVD players
Satellite and HD radio
PDAs
Digital camcorders
Set top Boxes
DSL Modems
High speed data ports
- USB 2.0/3.0
- High speed ethernet
- Infiniband
®
HF
Pb
FREE
HDTV Equipment
A/V Equipment
Cell phones
Digital still cameras
MP3 / Multimedia players
External storage
GPS
HALOGEN
- IEEE 1394
- DVI
- HDMI
Part Numbering System:
0603
ESDA
2
TR2
Surface Mount Device
Package size
Product family
Second generation designator
Packaging code
Description
The second generation PolySurg™ 0603ESDA2-TR2 ESD Suppressors
protect valuable high-speed data circuits from ESD damage without distorting
data signals as a result of its ultra-low (0.15pF maximum) capacitance.
Packaging
• 5000 pieces in paper tape on 7 inch diameter (178mm) reel per
EIA Standard 481.
Packaging Code
Package Code Suffix Description
-TR2
5000 pieces in paper tape on 7 inch diameter
(178mm) reel per EIA Standard 481
Features
Lead free, halogen free materials
0603/1608 footprint surface mount device
Ideal ESD protection for high frequency, low voltage applications
Exceeds testing requirements of IEC 61000-4-2
Ultra low capacitance (0.15pF maximum)
Very low leakage current
Fast response time
Bi-directional
Device Marking
PolySurg™ ESD Suppressors are marked on the tape and reel packages, not
individually. Since the product is bi-directional and symmetrical, no orientation
marking is required.
Max
30
60
--
15
0.15
100
45
+105
--
Specifications
Performance Characteristics
Continuous Operating Voltage
Clamping Voltage
1
Trigger Voltage
2
ESD Threat Voltage Capability
Capacitance (@ 1MHz)
Leakage Current (@ 12Vdc)
Peak Current
Operating Temperature
ESD Pulse Withstand
Units
Vdc
V
V
kv
pF
nA
A
°C
# Pulses
Min
--
--
--
--
--
--
--
-55
20
Typ
14
35
350
8
0.10
<0.1
30 Typ.
+25
>500
Design Consideration
The location in the circuit for the 0603ESDA2-TR2 Series has to be carefully
determined. For better performance, the device should be placed as close to
the signal input as possible and ahead of any other component. Due to the
high current associated with an ESD event, it is recommended to use a
“0-stub” pad design (pad directly on the signal/data line and second pad
directly on common ground).
Processing Recommendations
The 0603ESDA2-TR2 Series currently has a convex profile on the top surface
of the part. This profile is a result of the construction of the device. They can
be processed using standard pick-and-place equipment. The placement and
processing techniques for these devices are similar to those used for chip
resistors and chip capacitors.
1. Per IEC 61000-4-2, 30A @ 8kV, Level 4, contact discharge, measurement made 30ns
after initiation of pulse.
2. Trigger measurement made using Transmission Line Pulse (TLP) method.
0612
BU-SB12433
Page 1 of 2
Data Sheet 4419