Crane Aerospace & Electronics Power Solutions
MOR Single and Dual DC/DC Converters
28 VOLT INPUT – 120 WATT
HOW TO USE FUNCTIONS
P
OSITIVE
I
NPUT AND
I
NPUT
C
OMMON
Steady state voltage range is 16 to 40 VDC. Transient range is 40
to 50 V for a maximum of 120 msec. Low voltage lockout prevents
the units from operating below approximately 15.5 VDC input
voltage to keep system current levels smooth, especially during
initialization or re-start operations. All models include a soft-start
function to prevent large current draw and minimize overshhoot.
TRIM FORMULAS
Trim Up:
α
=
V
o
V
o nominal
,
1.0
≤ α ≤
1.1
(
R
T
(kΩ) =
V
o
– 1 • 20
2.5
– 50
(α -1)
)
C
ASE AND
E
XTERNAL
I
NPUT
F
ILTERS
Internal 500 V capacitors are connected between the case and
input common and between the case and output common. See
Figure 3.
Example:
V
o nominal
= 5.0
,
V
o
= 5.25
,
α
= 1.05
,
R
T
= 390 kΩ
1, 2, 3
Positive Input
Positive Output 10, 11, 12
1 Positive Input
Trim Down:
V
o
α
=
V
o nominal
,
0.6
≤ α ≤
1.0
28V
FME28-461
EMI Filter
4, 5, 6
Input Common
Output Common
7, 8, 9
Case
Chassis Ground
MOR
Single or Dual
Output
2 Input Common
R
T
(kΩ) = 50 •
α
– 30
1–
α
Example: V
o nominal
= 5.0
,
V
o
= 4.5
,
α
= 0.9
,
R
T
= 150 kΩ
I
NHIBIT
1
AND
2
F
IGURE
3: E
XTERNAL
F
ILTER
C
ONNECTION
Interpoint’s FME filters are recommended to meet CE03 require-
ments for reflected input line current. When using an external input
filter it is important that the case of the filter and the case of the
converter be connected through as low as an impedance as
possible. Direct connection of the baseplates to chassis ground is
the best connection. If connected by a single trace, the trace should
be as wide as it is long.
Two inhibit terminals disable switching, resulting in no output and
very low quiescent
Positive
Input
input current. The
two inhibit pins allow
access to an inhibit
function on either
side of the isolation
barrier to help main-
Inhibit 1
V
CC
tain isolation.
Input
Common
MOR Input Side
An open collector is
required for inter-
F
IGURE
6: I
NHIBIT
– I
NPUT
S
IDE
facing with both of
the inhibit pins. Applying an open-collector TTL logic low to either
inhibit pin will inhibit the
converter. Applying an
V
S
~
Voltage
Current
open collector TTL logic
E/A
Limit
high or leaving the pins
open will enable the
converter. Inhibit 1 is
referenced
to
Input
Feedback
Common, while Inhibit 2
Inhibit 2
is referenced to Sense
Sense
Return on the output side.
Return
MOR Output Side
T
RIM
Both single and dual output models include a trim function. Output
voltage can be trimmed from 60% up to 110% of nominal V out .
When trimming up, do not exceed the maximum output power.
When trimming down, do not exceed the maximum output current.
See Figure 4.
On dual models the positive output is regulated and the negative
output is transformer coupled (cross-regulated) to the positive
output. When trimming the duals, both output voltages will be
adjusted equally. See Figure 5.
3
Trim
R
T
MOR
Single
Output
Positive Output 7
Positive Sense 10
TRIM UP
10 Trim
Positive Output
R
T
7
TRIM UP
Sense Return
Output Common
9
8
MOR
Dual
Output
TRIM
DOWN
Output Common
8
TRIM DOWN
Negative Output
9
The open circuit voltage
for Inhibit 1 is 13 V and for
Inhibit 2 it is 8 V. Float the inhibit pin(s) if not used. The required
logic low voltage level is 0.2 V maximum.
F
IGURE
7: I
NHIBIT
– O
UTPUT
S
IDE
F
IGURE
4: T
RIM
– S
INGLE
www.craneae.com
F
IGURE
5: T
RIM
– D
UAL
See Figures 6 and 7.
Page 4 of 21
Rev G - 20060418
CRANE [ Crane Aerospace & Electronics. ]
