M I C
of Crystek Corporation
ROWAVE
A Division
Table II shows the details of the four 24 bit registers.
CPLL58-2400-2500
0.582"
×
0.800" SMD
REFERENCE COUNTER LATCH
LOCK DETECT
PRECISION
TEST MODE
BITS
ANTI-
BACKLASH
WIDTH
CONTROL
BITS
RESERVED
14-BIT REFERENCE COUNTER
DB23
X
DB22
0
DB21
0
DB20
LDP
DB19
T2
DB18
T1
DB17
ABP2
DB16
ABP1
DB15
R14
DB14
R13
DB13
R12
DB12
R11
DB11
R10
DB10
R9
DB9
R8
DB8
R7
DB7
R6
DB6
R5
DB5
R4
DB4
R3
DB3
R2
DB2
R1
DB1
C2(0)
DB0
C1(0)
N COUNTER LATCH
CP GAIN
CONTROL
BITS
RESERVED
13-BIT COUNTER
6-BIT COUNTER
DB23
DB22
DB21
G1
DB20
B13
DB19
B12
DB18
B11
DB17
B10
DB16
B9
DB15
B8
DB14
B7
DB13
B6
DB12
B5
DB11
B4
DB10
B3
DB9
B2
DB8
B1
DB7
A6
DB6
A5
DB5
A4
DB4
A3
DB3
A2
DB2
A1
DB1
C2(0)
DB0
C1(1)
FUNCTION LATCH
POWER-DOWN
2
POWER-DOWN
1
PD POLARITY
FASTLOCK
MODE
FASTLOCK
ENABLE
CP THREE-
STATE
PRESCALER
VALUE
COUNTER
RESET
CONTROL
BITS
CURRENT SETTING2
CURRENT SETTING 1
TIMER COUNTER CONTROL
MUXOUT CONTROL
DB23
P2
DB22
P1
DB21
PD2
DB20
CP16
DB19
CP15
DB18
CP14
DB17
CP13
DB16
CP12
DB15
CP11
DB14
TC4
DB13
TC3
DB12
TC2
DB11
TC1
DB10
F5
DB9
F4
DB8
F3
DB7
F2
DB6
M3
DB5
M2
DB4
M1
DB3
PD1
DB2
F1
DB1
C2(1)
DB0
C1(0)
INITIALIZATION LATCH
POWER-DOWN
2
POWER-DOWN
1
PD POLARITY
FASTLOCK
MODE
FASTLOCK
ENABLE
CP THREE-
STATE
PRESCALER
VALUE
COUNTER
RESET
CONTROL
BITS
CURRENT SETTING2
CURRENT SETTING 1
TIMER COUNTER CONTROL
MUXOUT CONTROL
DB23
P2
DB22
P1
DB21
PD2
DB20
CP16
DB19
CP15
DB18
CP14
DB17
CP13
DB16
CP12
DB15
CP11
DB14
TC4
DB13
TC3
DB12
TC2
DB11
TC1
DB10
F5
DB9
F4
DB8
F3
DB7
F2
DB6
M3
DB5
M2
DB4
M1
DB3
PD1
DB2
F1
DB1
C2(1)
DB0
C1(1)
Table II. Latch Summary
When using the CPLL58 family in a synthesizer application, all four 24 bit registers need to be written
into after power-up. After writing all four latches the first time, subsequent frequency step changes can
be accomplished by changing the N Counter Latch only.
Specifications subject to change without notice.
Page 5 of 6
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