Recommended Land Pattern
Routing Examples
Outline of Substrate
8 Bit , 3 x 3 Array
(10X)
1.27 mm pitch land
patterns are shown.
5 mil line widths shown.
Blind via to Vtt
reference plane layer.
Open via’s on top of
land pads are not
recommended due to
solder wicking.
Signal
Lines
32 Bit , 3 x 12 Array
(5X)
PCB Pad Diameter
Solder Mask Dia = Pad
Diameter +.15mm (.006 inch)
1.00mm Pitch (B7) = 0.51mm/.020 inch (minimum)
1.27mm pitch (B6) = 0.64mm/.025 inch (minimum)
For .006" Thick Solder Paste Stencil, Aperture Opening Should
be Equal to the PCB Pad Diameter.
Refer to
www.ctscorp.com/components/clearone.asp
for
additional PCB design information
16 Bit , 3 x 6 Array
(10X)
Signal
Lines
Frequency P erform ance
(5 0 oh m Ne tw ork )
Cross Talk Performance
(50 ohm Network
)
H
Aggressor
1nS
250mV
F
E
I
A
B
D
F requency R esponse for 50 ohm Netw ork
100
90
80
70
60
50
40
30
20
10
0
C
Aggressor on
Lead A
250mV 1nS
Rise Time
Victim B
Victim C
Victim D
Victim E
Victim F
Measured
Voltage
(Peak to Peak)
3.3 mV
1.9 mV
1.5 mV
1.5 mV
1.5 mV
2.1 mV
3.3 mV
Aggressor on
Lead B
250mV 1nS
Rise Time
Victim A
Victim C
Victim D
Victim E
Victim F
Victim H
Victim I
Measured
Voltage
(Peak to Peak)
3.2 mV
2.7 mV
1.8 mV
1.4 mV
1.5 mV
1.5 mV
2.0 mV
60
0
20
0
40
0
80
0
00
00
00
00
18
12
10
14
00
20
16
00
Victim H
Victim I
M Hz
CTS Electronic Components
www.ctscorp.com
© 2006 CTS Corporation. All rights reserved. Information subject to change.
Page 2
GTL, GTL+, AGTL+ Terminator
March 06
CTS [ CTS CORPORATION ]
