CY2212
Direct Rambus™ Clock Generator (Lite)
Features
• Direct Rambus™ clock support
• High-speed clock support
• Input Select option
• Crystal Oscillator Divider Output
• Output edge-rate control
• 16-pin TSSOP
Benefits
• One pair of differential output drivers
• 400-MHz maximum, 300-MHz minimum output
frequency
• PLL multiplier select
• LCLK = XTAL/2, not driven by phase-locked loop (PLL)
• Minimize EMI
• Space-saving, low-cost package
Logic Block Diagram
XIN
XOUT
CLK
CLKB
Xtal
Oscillator
PLL
xM
S
/2
LCLK
Xtal Value = 18.75 MHz
Pin Configuration
16-pin TSSOP
TOP VIEW
VDDP
VSSP
XOUT
XIN
VDDL
LCLK
VSSL
NC
1
2
3
16
15
14
S
VDD
VSS
CLK
CLKB
VSS
VDD
NC
CY2212
4
5
6
7
8
13
12
11
10
9
Frequency Select Table
S
0
1
M (PLL Multiplier)
16
64/3
CLK,CLKB
300 MHz
400 MHz
LCLK
9.375 MHz
9.375 MHz
Cypress Semiconductor Corporation
Document #: 38-07466 Rev. *A
•
3901 North First Street
•
San Jose
,
CA 95134
•
408-943-2600
Revised January 12, 2005
CYPRESS [ CYPRESS SEMICONDUCTOR ]
