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CY62148ELL-45ZSXI 参数 Datasheet PDF下载

CY62148ELL-45ZSXI图片预览
型号: CY62148ELL-45ZSXI
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K ×8)静态RAM [4-Mbit (512K x 8) Static RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 10 页 / 942 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY62148E MoBL
®
4-Mbit (512K x 8) Static RAM
Features
• Very high speed: 45 ns
• Voltage range: 4.5V–5.5V
• Pin compatible with CY62148B
• Ultra low standby power
— Typical standby current: 1 µA
— Maximum standby current: 7 µA (Industrial)
• Ultra low active power
— Typical active current: 2.0 mA @ f = 1 MHz
• Easy memory expansion with CE, and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 32-pin TSOP II and 32-pin SOIC
packages
Functional Description
The CY62148E is a high performance CMOS static RAM
organized as 512K words by 8 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL
®
) in
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
Placing the device into standby mode reduces power
consumption by more than 99% when deselected (CE HIGH).
The eight input and output pins (IO
0
through IO
7
) are placed
in a high impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• Write operation is active (CE LOW and WE LOW)
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight IO pins (IO
0
through IO
7
)
is then written into the location specified on the address pins
(A
0
through A
18
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appear on the IO pins.
Product Portfolio
Power Dissipation
Product
Range
V
CC
Range (V)
Min
CY62148ELL
CY62148ELL
TSOP II
SOIC
Ind’l
Ind’l/Auto-A
4.5
4.5
Typ
5.0
5.0
Max
5.5
5.5
45
55
Speed
(ns)
Operating I
CC
(mA)
f = 1MHz
Typ
2
2
Max
2.5
2.5
f = f
max
Typ
15
15
Max
20
20
Standby I
SB2
(µA)
Typ
1
1
Max
7
7
Notes
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at
http://www.cypress.com.
2. SOIC package is available only in 55 ns speed bin.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25°C.
Cypress Semiconductor Corporation
Document #: 38-05442 Rev. *F
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised March 28, 2007