CY7C164
CY7C166
Switching Waveforms
Read Cycle No.1
[9, 10]
t
RC
ADDRESS
t
OHA
DATA OUT
PREVIOUS DATA VALID
t
AA
DATA VALID
C164–7
Read Cycle No. 2
[9, 11]
CE
t
ACE
OE
7C166
t
DOE
t
LZOE
HIGH IMPEDANCE
t
LZCE
V
CC
SUPPLY
CURRENT
t
PU
50%
t
PD
ICC
50%
ISB
C164–8
t
RC
t
HZOE
t
HZCE
DATA VALID
HIGH
IMPEDANCE
DATA OUT
Write Cycle No. 1 (WE Controlled)
[8, 12]
t
WC
ADDRESS
t
SCE
CE
t
SA
WE
t
SD
DATA IN
DATA
IN
VALID
t
HZWE
DATA I/O
DATA UNDEFINED
C164–9
t
AW
t
PWE
t
HA
t
HD
t
LZWE
HIGH IMPEDANCE
Notes:
9. WE is HIGH for read cycle.
10. Device is continuously selected, CE = V
IL
. (CY7C166: OE = V
IL
also).
11. Address valid prior to or coincident with CE transition LOW.
12. CY7C166 only: Data I/O will be high-impedance if OE = V
IH
.
Document #: 38-05025 Rev. **
Page 4 of 9
CYPRESS [ CYPRESS SEMICONDUCTOR ]
