欢迎访问ic37.com |
会员登录 免费注册
发布采购

CY7C342B-30JC 参数 Datasheet PDF下载

CY7C342B-30JC图片预览
型号: CY7C342B-30JC
PDF下载: 下载PDF文件 查看货源
内容描述: 128宏单元MAX EPLD中 [128-Macrocell MAX EPLDs]
分类和应用:
文件页数/大小: 14 页 / 351 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
 浏览型号CY7C342B-30JC的Datasheet PDF文件第4页浏览型号CY7C342B-30JC的Datasheet PDF文件第5页浏览型号CY7C342B-30JC的Datasheet PDF文件第6页浏览型号CY7C342B-30JC的Datasheet PDF文件第7页浏览型号CY7C342B-30JC的Datasheet PDF文件第9页浏览型号CY7C342B-30JC的Datasheet PDF文件第10页浏览型号CY7C342B-30JC的Datasheet PDF文件第11页浏览型号CY7C342B-30JC的Datasheet PDF文件第12页  
USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
CY7C342B
Commercial and Industrial Typical Internal Switching Characteristics
Over Operating Range (continued)
7C342B-25
Parameter
t
COMB[9]
t
IC
t
ICS
t
FD
t
PRE
t
CLR
t
PIA
Description
Transparent Mode Delay
Asynchronous Clock Logic Delay
Synchronous Clock Delay
Feedback Delay
Asynchronous Register Preset Time
Asynchronous Register Clear Time
Programmable Interconnect Array Delay Time
Min.
Max.
3
14
3
1
5
5
14
7C342B-30
Min.
Max.
4
16
2
1
6
6
16
7C342B-35
Min.
Max.
4
16
1
2
7
7
20
Unit
ns
ns
ns
ns
ns
ns
ns
Switching Waveforms
External Combinatorial
DEDICATED INPUT/
I/O INPUT
t
PD1
/t
PD2
COMBINATORIAL
OUTPUT
External Synchronous
t
WH
t
WL
SYNCHRONOUS
CLOCK PIN
SYNCHRONOUS
CLOCK AT REGISTER
DATA FROM
LOGIC ARRAY
t
SU
t
H
t
CO1
REGISTERED
OUTPUTS
External Asynchronous
DEDICATED INPUTS OR
REGISTERED FEEDBACK
t
AS1
ASYNCHRONOUS
CLOCK INPUT
t
AH
t
AWH
t
AWL
Document #: 38-03014 Rev. *B
Page 8 of 14