CY7C65640A
TetraHub™ High Speed USB
Hub Controller
Features
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Integrated upstream and downstream series termination
resistors
Configurable with external SPI EEPROM
❐
Number of Active Ports
❐
Number of Removable Ports
❐
Maximum Power
❐
Hub Controller Power
❐
Power-On Timer
❐
Overcurrent Timer
❐
Disable Overcurrent Timer
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Enable Full Speed Only
❐
Disable Port Indicators
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Gang Power Switching
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Enable Single TT Mode Only
❐
Enable NoEOPatEOF1
USB 2.0 hub
Four downstream ports
Multiple transaction translators - one per downstream port for
maximum performance
VID, PID, and DID configured from external SPI EEPROM
24 MHz external crystal
Small package - Quad Flat Pack, no leads (QFN)
Integrated upstream pull up resistor
Integrated downstream pull down resistors for all downstream
ports
Logic Block Diagram
D+
D–
High speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
USB 2.0 PHY
24 MHz
Crystal
Serial
Interface
Engine
PLL
USB Upstream
Transaction Translator (X4)
Hub Repeater
TT RAM
Routing Logic
USB
Downstream
USB
Downstream
USB
Downstream
USB
Downstream
USB Port Pow- Port
2.0 er Control Sta-
USB Port Pow- Port
2.0 er Control Sta-
USB Port Pow- Port
2.0 er Control Sta-
USB Port Pow- Port
2.0 er Control Sta-
D+ D– PWR#[1 OVR#[1LED D+ D– PWR#[2 OVR#[2LED D+ D– PWR#[3 OVR#[3LED D+ D– PWR#[4 OVR#[4LED
Cypress Semiconductor Corporation
Document #: 38-08019 Rev. *J
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised February 10, 2009
CYPRESS [ CYPRESS SEMICONDUCTOR ]
