1.
Pin Information
This chapter describes, lists, and illustrates the CY8C21x34 PSoC device pins and pinout configurations.
1.1
Pinouts
The CY8C21x34 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port
pin (labeled with a “P”) is capable of Digital IO and connection to the common analog bus. However, Vss, Vdd, SMP, and XRES are
not capable of Digital IO.
1.1.1
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
IO
IO
IO
IO
IO
IO
IO
IO
16-Pin Part Pinout
Type
Table 1-1. 16-Pin Part Pinout (SOIC)
Digital
IO
IO
IO
IO
Analog
I, M
I, M
I, M
I, M
Power
Power
M
Power
M
M
M
I, M
I, M
I, M
I, M
Power
Name
P0[7]
P0[5]
P0[3]
P0[1]
SMP
Vss
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
Optional External Clock Input (EXTCLK).
Analog column mux input.
Analog column mux input.
Analog column mux input.
Analog column mux input.
Supply voltage.
Description
Analog column mux input.
Analog column mux input.
Analog column mux input, integrating
input.
Analog column mux input, integrating
input.
Switch Mode Pump (SMP) connection to
required external components.
Ground connection.
I2C Serial Clock (SCL), ISSP-SCLK*.
Ground connection.
I2C Serial Data (SDA), ISSP-SDATA*.
CY8C21234 16-Pin PSoC Device
A, I, M, P0[7]
A, I, M, P0[5]
A, I, M, P0[3]
A, I, M, P0[1]
SMP
Vss
M,I2C SCL,P1[1]
Vss
1
2
3
4
5
6
7
8
SOIC
16
15
14
13
12
11
10
9
Vdd
P0[6], A, I, M
P0[4], A, I, M
P0[2], A, I, M
P0[0], A, I, M
P1[4], EXTCLK, M
P1[2],M
P1[0], I2C SDA, M
LEGEND
A = Analog, I = Input, O = Output, and M = Analog Mux Input.
* These are the ISSP pins, which are not High Z at POR (Power On Reset).
See the PSoC Mixed-Signal Array Technical Reference Manual for details.
January 12, 2007
Document No. 38-12025 Rev. *K
8
CYPRESS [ CYPRESS SEMICONDUCTOR ]
