CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
®
PSoC Mixed-Signal Array
Features
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Powerful Harvard Architecture Processor
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M8C Processor Speeds to 24 MHz
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Low power at high speed
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2.4V to 5.25V Operating Voltage
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Operating Voltages Down to 1.0V using On-Chip Switch
Mode Pump (SMP)
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Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC Blocks)
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4 Analog Type “E” PSoC Blocks provide:
• 2 Comparators with DAC Refs
• Single or Dual 8-Bit 28 Channel ADC
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4 Digital PSoC Blocks provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART, SPI™ Master or Slave
• Connectable to All GPIO Pins
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Complex Peripherals by Combining Blocks
Flexible On-Chip Memory
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8K Flash Program Storage 50,000 Erase/Write Cycles
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512 Bytes SRAM Data Storage
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In-System Serial Programming (ISSP™)
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Partial Flash Updates
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Flexible Protection Modes
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EEPROM Emulation in Flash
Complete Development Tools
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Free Development Software
(PSoC Designer™)
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Full-Featured, In-Circuit Emulator and Programmer
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Full Speed Emulation
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Complex Breakpoint Structure
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128K Trace Memory
Precision, Programmable Clocking
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Internal ±2.5% 24/48 MHz Oscillator
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Internal Oscillator for Watchdog and Sleep
Programmable Pin Configurations
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25 mA Drive on All GPIO
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Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
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Up to 8 Analog Inputs on GPIO
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Configurable Interrupt on All GPIO
Versatile Analog Mux
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Common Internal Analog Bus
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Simultaneous Connection of IO Combinations
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Capacitive Sensing Application Capability
Additional System Resources
2
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I C™ Master, Slave and Multi-Master to 400 kHz
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Watchdog and Sleep Timers
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User-Configurable Low Voltage Detection
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Integrated Supervisory Circuit
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On-Chip Precision Voltage Reference
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Block Diagram
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Cypress Semiconductor Corporation
Document Number: 38-12025 Rev. *M
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised April 18, 2008