DMM Analog front end with Inrush
Multi-level low battery detector
STBEEP comparator in Diode mode
STBEEP comparator in Cont. mode
HCF detection voltage
Inrush measurement integration time
Frequency input sensitivity (FREQ)
Frequency input sensitivity (FREQ)
Reference voltage temperature
coefficient
Capacitance measurement
Accuracy
5
Note:
1. Full Scale (6000 counts for SADC and 600 counts for FADC)
2. SADC = High resolution ADC (slow speed)
3. FADC = High speed ADC (lower resolution)
4. ES51970 built-in 3
rd
order low pass filter available for AC mode
5. Gain calibration is necessary for higher accuracy
Fin
Fin
TC
RF
Square wave with
Duty cycle 40-60%
Sine wave
100KΩ
resister
Between
VRH
0℃<TA<70℃
6.0nF – 60mF
V
t1
V
t2
V
t3
LBAT vs. V-
OVX to SGND
OVX to SGND
VR2-VR5
—
—
—
—
—
—
—
500
400
—
-2.5
-3
2.15
2.03
1.83
+9
-7
1100
100
—
—
50
—
—
—
—
—
—
—
—
—
—
—
—
2.5
3
V
V
V
mV
mV
mV
ms
mVp
mVrms
ppm/℃
%F.S
counts
ES51970(6000counts)
ver. 2.8
6
12/01/12
CYRUSTEK [ Cyrustek corporation ]
