PL3842B 参数 Datasheet PDF下载

CYStech Electronics Corp.

Figure 16:Latched Shutdown

Spec. No. : C510P8

Issued Date : 2003.04.24

Revised Date :

Page No. : 10/15

4

OSC

8

R

BIAS

R

1mA

2R

2

EA

R

1

5

2N

3905

2N

3903

SCR must be selected for a holding current of less than 0.5mA at TA(min).

The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.

Figure 17:External Clock Synchronization

8

R

BIAS

RT

R

4

EXTERNAL

SYNC INPUT

0.01

μ

F

CT

OSC

+

47

Ω

2

1

2R

R

5

The diode clamp is required if the Sync amplitude is large enough to cause

the bottom side of CT to go more than 300mV below ground.

PL384XBP8

CYStek Product Specification