欢迎访问ic37.com |
会员登录 免费注册
发布采购

DS1230ABP-100 参数 Datasheet PDF下载

DS1230ABP-100图片预览
型号: DS1230ABP-100
PDF下载: 下载PDF文件 查看货源
内容描述: 256K非易失SRAM [256k Nonvolatile SRAM]
分类和应用: 内存集成电路静态存储器
文件页数/大小: 12 页 / 216 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
 浏览型号DS1230ABP-100的Datasheet PDF文件第4页浏览型号DS1230ABP-100的Datasheet PDF文件第5页浏览型号DS1230ABP-100的Datasheet PDF文件第6页浏览型号DS1230ABP-100的Datasheet PDF文件第7页浏览型号DS1230ABP-100的Datasheet PDF文件第9页浏览型号DS1230ABP-100的Datasheet PDF文件第10页浏览型号DS1230ABP-100的Datasheet PDF文件第11页浏览型号DS1230ABP-100的Datasheet PDF文件第12页  
DS1230Y/AB
POWER-DOWN/POWER-UP TIMING
PARAMETER
CE, at V
IH
before Power-Down
V
CC
slew from V
TP
to 0V (
CE
at V
IH
)
V
CC
slew from 0V to V
TP
(
CE
at V
IH
)
CE
(t
A
: See Note 10)
MIN
0
300
300
2
125
TYP
MAX
UNITS
µs
µs
µs
ms
NOTES
11
SYMBOL
t
PD
t
F
t
R
t
REC
at V
IH
after Power-Up
(t
A
=25°C)
PARAMETER
Expected Data Retention Time
SYMBOL
t
DR
MIN
10
TYP
MAX
UNITS
years
NOTES
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a Read Cycle.
2.
OE
= V
IH
or V
IL
. If
OE
= V
IH
during write cycle, the output buffers remain in a high-impedance state.
3. t
WP
is specified as the logical AND of
CE
and
WE
. t
WP
is measured from the latter of
CE
or
WE
going low to the earlier of
CE
or
WE
going high.
4. t
DH
, t
DS
are measured from the earlier of
CE
or
WE
going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the
CE
low transition occurs simultaneously with or latter than the
WE
low transition, the output
buffers remain in a high-impedance state during this period.
7. If the
CE
high transition occurs prior to or simultaneously with the
WE
high transition, the output
buffers remain in high-impedance state during this period.
8. If
WE
is low or the
WE
low transition occurs prior to or simultaneously with the
CE
low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1230Y has a built-in switch that disconnects the lithium source until V
CC
is first applied by
the user. The expected t
DR
is defined as accumulative time in the absence of V
CC
starting from the
time power is first applied by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power-down condition the voltage on any pin may not exceed the voltage on V
CC
.
12. t
WR1
and t
DH1
are measured from
WE
going high.
13. t
WR2
and t
DH2
are measured from
CE
going high.
14. DS1230 DIP modules are recognized by Underwriters Laboratory (U.L.) under file E99151.
DS1230 PowerCap modules are pending U.L. review. Contact the factory for status.
8 of 12