DS1232LP/LPS
DS1232LP/LPS
Low Power MicroMonitor Chip
FEATURES
PIN ASSIGNMENT
NC
PBRST
TD
TOL
1
2
3
4
8
7
6
5
V
CC
ST
RST
RST
PBRST
NC
TD
NC
TOL
NC
DS1232LP 8–Pin DIP
(300 Mil)
See Mech. Drawings
Section
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
VCC
NC
ST
NC
RST
NC
RST
•
Super low-power version of DS1232
•
50
mA
quiescent current
•
Halts and restarts an out–of–control microprocessor
•
Automatically
failure
restarts microprocessor after power
GND
•
Monitors pushbutton for external override
•
Accurate 5%
monitoring
or 10% microprocessor power supply
DS1232LPS 16–Pin SOIC
(300 Mil)
See Mech. Drawings
Section
PBRST
TD
TOL
GND
1
2
3
4
8
7
6
5
VCC
ST
RST
RST
•
8–pin DIP, 8–pin SOIC or space saving
µ–SOP
pack-
age available
•
Optional 16–pin SOIC package available
•
Industrial temperature –40°C to +85°C available, des-
ignated N
PBRST
TD
TOL
GND
1
2
3
4
8
7
6
5
V
CC
ST
RST
RST
DS1232LPµ
(118 MIL
µ–SOP)
See Mech. Drawings
Section
DS1232LPS–2 8–Pin
SOIC
(150 Mil)
See Mech. Drawings
Section
PIN DESCRIPTION
PBRST
TD
TOL
GND
RST
RST
ST
V
CC
–
–
–
–
–
–
–
–
Pushbutton Reset Input
Time Delay Set
Selects 5% or 10% V
CC
Detect
Ground
Reset Output (Active High)
Reset Output (Active Low, open drain)
Strobe Input
+5 Volt Power
DESCRIPTION
The DS1232LP/LPS Low Power MicroMonitor Chip
monitors three vital conditions for a microprocessor:
power supply, software execution, and external over-
ride. First, a precision temperature–compensated refer-
ence and comparator circuit monitors the status of V
CC
.
When an out–of–tolerance condition occurs, an internal
power fail signal is generated which forces reset to the
active state. When V
CC
returns to an in-tolerance condi-
tion, the reset signals are kept in the active state for a
minimum of 250 ms to allow the power supply and pro-
cessor to stabilize.
The second function the DS1232LP/LPS performs is
pushbutton reset control. The DS1232LP/LPS de-
bounces the pushbutton input and guarantees an active
reset pulse width of 250 ms minimum. The third function
is a watchdog timer. The DS1232LP/LPS has an inter-
nal timer that forces the reset signals to the active state if
062698 1/7
DALLAS [ DALLAS SEMICONDUCTOR ]
