DS1339 I C Serial Real-Time Clock
2
POWER-UP/DOWN CHARACTERISTICS
(T
A
= -40 C to +85°C) (Note 1, Figure 1)
PARAMETER
Recovery at Power-Up
V
CC
Fall Time; V
PF(MAX)
to V
PF(MIN)
V
CC
Rise Time; V
PF(MIN)
to V
PF(MAX)
SYMBOL
t
REC
t
VCCF
t
VCCR
CONDITIONS
(Note 14)
300
0
MIN
TYP
MAX
2
UNITS
ms
ms
ms
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in
battery-backup mode.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Limits at -40°C are guaranteed by design and are not production tested.
SCL only.
SDA and SQW/INT.
I
CCA
—SCL at f
SC
max, V
IL
= 0.0V, V
IH
= V
CC
, trickle charger disabled.
Specified with the I
2
C bus inactive, V
IL
= 0.0V, V
IH
= V
CC
, trickle charger disabled.
Using recommended crystal on X1 and X2.
After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
IHMIN
of the SCL signal) to bridge
the undefined region of the falling edge of SCL.
The maximum t
HD:DAT
need only be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
³
to 250ns must then be met. This is
automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line t
R(MAX)
+ t
SU:DAT
= 1000 + 250 = 1250ns before the SCL line
is released.
C
B
—total capacitance of one bus line in pF.
Guaranteed by design. Not production tested.
The parameter t
OSF
is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of 0.0V
£
V
CC
£
V
CCMAX
and 1.3V
£
V
BACKUP
£
3.7V.
This delay applies only if the oscillator is running. If the oscillator is disabled or stopped, no power-up delay occurs.
Note 11:
Note 12:
Note 13:
Note 14:
Figure 1. Power-Up/Down Timing
V
CC
V
PF(MAX)
V
PF(MIN)
t
VCCF
t
VCCR
t
REC
INPUTS
RECOGNIZED
DON'T CARE
RECOGNIZED
HIGH-Z
OUTPUTS
VALID
VALID
5 of 18
DALLAS [ DALLAS SEMICONDUCTOR ]
