DS1481
PRELIMINARY
DS1481
1–Wire Bus Master with Overdrive
FEATURES
PIN ASSIGNMENT
V
CC
ENI
O1/BSY1
O2/BSY2
D/CLK
RES
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
I/O
ENO
I1
I2
NC
NC
GND
•
Provides a synchronous interface to Dallas Semicon-
ductor 1–wire devices
•
Compatible with low power parallel ports
•
Can be cascaded with other DS1481’s
•
Allows print spooler and other processes to run during
1–wire I/O
•
Provides
high speed communcation with overdrive
capable devices
14–PIN SOIC (150 MIL)
•
Space saving 14–pin (150 mil), SOIC package
PIN DESCRIPTION
V
CC
ENI
D/CLK
RES
O1/BSY1
O2/BSY2
GND
I1
I2
I/O
ENO
NC
–
–
–
–
–
–
–
–
–
–
–
–
Supply
Enable In
Data/Clock
Reset
Output 1/Busy 1
Output 2/Busy 2
Ground
Input 1
Input 2
1–wire I/O
Enable Out
No Connect
DESCRIPTION
The DS1481 is a dedicated 1–wire timing generator.
The device is normally used in conjunction with a paral-
lel port controller to provide the necessary interface to
the host processor. Busy signals allow the host proces-
sor to perform other tasks while 1–wire “time–slots” are
completed. The DS1481 also saves the state of D/CLK
and RES allowing print spoolers to operate without
affecting 1–wire communication.
DS1481 based devices can be cascaded. The first
device’s O1/BSY1 and O2/BSY2 connect to the PC
printer port’s BUSY and SELECT OUT signals (pins 11
and 13 respectively). The next DS1481 connects its
O1/BSY1 and O2/BSY2 to the first device’s I1 and I2
respectively. ENO of the first device connects to ENI of
the second device. More DS1481’s can be stacked in a
similar manner. The last devices I1 and I2 connect to
BUSY and SELECT of the attached printer.
The DS1481’s 3–volt operation insures compatibility
with most low power parallel ports (i.e., portable com-
puters).
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