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User’s Guide
www.dalsemi.com
High-Speed Microcontroller
User Guide
SmartSocket 16K/64K
SECTION 1: INTRODUCTION
The Dallas Semiconductor High-Speed Microcontroller is an 8051-compatible device that provides
improved performance and power consumption compared to the original version. It retains instruction set
and object code compatibility with the 8051, yet performs the same operations in fewer clock cycles.
Consequently, more throughput is possible for the same crystal speed. As an alternative, the High-Speed
Microcontroller can be run slowly to save power. The more efficient design allows a much slower crystal
speed to get the same results as an original 8051, using much less power.
The fundamental innovation of the High-Speed Microcontroller is the use of only four clocks per
instruction cycle compared with twelve for the original 8051. This results in up to 3 times improvement
in performance. In addition, the High-Speed Microcontroller is updated with several new peripherals and
features while providing all of the standard features of an 80C32. These include 256 bytes of on-chip
RAM, 32 I/O ports, three 16-bit timer/counters, and an on-chip UART. All devices provide 256 bytes of
RAM for variables and stack. 128 bytes can be reached using direct addressing and 128 using indirect
addressing.
In addition to improved efficiency, members of the High-Speed Microcontroller family can operate at a
maximum clock rate of 33 or 40 MHz. Combined with the 3 times performance, this allows for a
maximum performance equivalent to a 99 or 120 MHz 8051. This level of computing power is
comparable to many 16-bit processors, but without the added expense and complexity if implementing a
16-bit interface.
A number of peripherals were added to the original 80C32 core when designing the High-Speed
Microcontroller family. Some devices have a programmable watchdog Timer to supervise the system. It
will count up to a user programmable interval and then reset the CPU unless cleared by software. Other
features such as a second, full-function UART and dual data pointers are available to minimize external
interrupts allows greater flexibility in dealing with external events.
Some members of the High-Speed Microcontroller family incorporate Power Management Modes which
allow the device to dynamically vary the internal clock speed from 4 clocks per cycle (default) to 64 or
1024 clocks per cycle. Because power consumption is directly proportional to clock speed, the device
can reduce its operating frequency during periods of little or no activity. This greatly reduces power
consumption. The switch-back feature allows the device to quickly return in divide by 4 mode upon
receipt of an interrupt or serial port activity, allowing the device to respond to external events while in
Power Management Mode.
Various memory configurations are available with the High-Speed Microcontroller family. EPROM and
Mask programmable ROM versions are available for program memory. Some versions incorporate
extended MOVX SRAM on-chip, reducing or eliminating the need for external data memory. This
memory can be made nonvolatile in the DS87C530 through the use of an external lithium battery.
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