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3D7444 参数 Datasheet PDF下载

3D7444图片预览
型号: 3D7444
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片4通道4位可编程延迟线(系列3D7444 ) [MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE (SERIES 3D7444)]
分类和应用: 延迟线
文件页数/大小: 6 页 / 318 K
品牌: DATADELAY [ DATA DELAY DEVICES, INC. ]
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3D7444
MONOLITHIC QUAD 4-BIT
PROGRAMMABLE DELAY LINE
(SERIES 3D7444)
FEATURES
Four indep’t programmable lines on a single chip
All-silicon CMOS technology
Low quiescent current (1mA typical)
Leading- and trailing-edge accuracy
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Increment range:
1.5ns through 25ns
Delay tolerance:
1ns or 2% (See Table 1)
Temperature stability:
±2%
typical (0C-70C)
Vdd stability:
±1%
typical
Minimum input pulse width:
10% of total delay
I1
SC
I2
I3
I4
SI
GND
1
2
3
4
5
6
7
PACKAGES
14
13
12
11
10
9
8
VDD
AL
O1
SO
O2
O3
O4
I1
SC
I2
I3
I4
SI
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
AL
O1
SO
O2
O3
O4
DIP-14
3D7444-xx
SOIC-14
3D7444D-xx
For mechanical dimensions, click
.
For package marking details, click
.
FUNCTIONAL DESCRIPTION
The 3D7444 device is a small, versatile, quad 4-bit programmable
monolithic delay line. Delay values, programmed via the serial interface,
can be independently varied over 15 equal steps. The step size (in ns) is
determined by the device dash number. Each input is reproduced at the
corresponding output without inversion, shifted in time as per user
selection. For each line, the delay time is given by:
TD
n
= T0 + A
n
* TI
PIN DESCRIPTIONS
I1-I4
O1-O4
AL
SC
SI
SO
VDD
GND
Signal Inputs
Signal Outputs
Address Latch In
Serial Clock In
Serial Data In
Serial Data Out
5.0V
Ground
where T0 is the inherent delay, A
n
is the delay address of the n-th line and
TI is the delay increment (dash number). The desired addresses are shifted into the device via the SC and
SI inputs, and the addresses are latched using the AL input. The serial interface can also be used to
enable/disable each delay line. The 3D7444 operates at 5 volts and has a typical T0 of 6ns. The 3D7444 is
CMOS-compatible, capable of sourcing or sinking 4mA loads, and features both rising- and falling-edge
accuracy. The device is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount
14-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D7444-1.5
3D7444-2
3D7444-4
3D7444-5
3D7444-8
3D7444-10
3D7444-15
3D7444-20
3D7444-25
DELAYS AND TOLERANCES (ns)
Delay
Increment
1.5
±
1.00
2.0
±
1.50
4.0
±
2.00
5.0
±
2.25
8.0
±
3.00
10
±
3.00
15
±
4.00
20
±
6.00
25
±
7.00
Total
Delay
22.5
±
1.0
30.0
±
1.0
60.0
±
1.2
75.0
±
1.5
120
±
2.4
150
±
3.0
225
±
4.5
300
±
6.0
375
±
7.5
Inherent
Delay
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
6
±
2.0
INPUT RESTRICTIONS
Max Freq. (MHz)
Recommended
Absolute
20.0
166
13.8
166
7.57
83.3
6.17
66.6
3.96
41.6
3.20
33.3
2.16
22.2
1.63
16.6
1.31
13.3
Min P.W. (ns)
Recommended
Absolute
25.0
3.0
36.0
3.0
66.0
6.0
81.0
7.5
126.0
12.0
156.0
15.0
231.0
22.5
306.0
30.0
381.0
37.5
2003
Data Delay Devices
NOTES: Any increment between 1.5 and 25 ns not shown is also available as standard
Total delay is given by delay at address 15 minus delay at address 0
Doc #03006
12/8/03
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1