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PDU54-1000MC4 参数 Datasheet PDF下载

PDU54-1000MC4图片预览
型号: PDU54-1000MC4
PDF下载: 下载PDF文件 查看货源
内容描述: 4位, ECL -接口可编程延迟线(系列PDU54 ) [4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU54)]
分类和应用: 延迟线逻辑集成电路光电二极管
文件页数/大小: 4 页 / 250 K
品牌: DATADELAY [ DATA DELAY DEVICES, INC. ]
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PDU54
4-BIT, ECL-INTERFACED
PROGRAMMABLE DELAY LINE
(SERIES PDU54)
FEATURES
Digitally programmable in 16 delay steps
Monotonic delay-versus-address variation
Precise and stable delays
Input & outputs fully 100K-ECL interfaced & buffered
Available in 24-pin DIP (600 mil) socket or SMD
PDU54-xx DIP
PDU54-xxM Military DIP
N/C
N/C
GND
N/C
N/C
N/C
N/C
N/C
GND
OUT
N/C
N/C
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
data
3
delay
devices,
inc.
PACKAGES
IN
N/C
VEE
A3
N/C
N/C
A2
A1
VEE
A0
N/C
N/C
N/C
N/C
GND
N/C
N/C
N/C
N/C
N/C
GND
OUT
N/C
N/C
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
IN
N/C
VEE
A3
N/C
N/C
A2
A1
VEE
A0
N/C
N/C
PDU54-xxC4 SMD
PDU54-xxMC4 Mil SMD
FUNCTIONAL DESCRIPTION
The PDU54-series device is a 4-bit digitally programmable delay line. The
delay, TD
A
, from the input pin (IN) to the output pin (OUT) depends on the
address code (A3-A0) according to the following formula:
TD
A
= TD
0
+ T
INC
* A
PIN DESCRIPTIONS
IN
OUT
A3-A0
VEE
GND
Signal Input
Signal Output
Address Bits
-5 Volts
Ground
where A is the address code, T
INC
is the incremental delay of the device, and TD
0
is the inherent delay of
the device. The incremental delay is specified by the dash number of the device and can range from
100ps through 3000ps, inclusively. The address is not latched and must remain asserted during normal
operation.
SERIES SPECIFICATIONS
Total programmed delay tolerance:
5% or 40ps,
whichever is greater
Inherent delay (TD
0
):
3.3ns typical
Address to input setup (T
AIS
):
2.9ns
Operating temperature:
0° to 85° C
Temperature coefficient:
100PPM/°C (excludes TD
0
)
Supply voltage V
EE
:
-5VDC
±
0.7V
Power Supply Current:
-300ma typical (50Ω to -2V)
Minimum pulse width:
3ns or 10% of total delay,
whichever is greater
Minimum period:
8ns or 2 x pulse width, whichever
is greater
A
i-1
PW
IN
IN
TD
A
OUT
Figure 1: Timing Diagram
1997
Data Delay Devices
DASH NUMBER SPECIFICATIONS
Part
Number
PDU54-100
PDU54-200
PDU54-250
PDU54-400
PDU54-500
PDU54-750
PDU54-1000
PDU54-1200
PDU54-1500
PDU54-2000
PDU54-2500
PDU54-3000
Incremental Delay
Per Step (ps)
100
±
50
200
±
60
250
±
60
400
±
80
500
±
100
750
±
100
1000
±
200
1200
±
200
1500
±
200
2000
±
400
2500
±
400
3000
±
500
Total Delay
Change (ns)
1.50
3.00
3.75
6.00
7.50
11.25
15.00
18.00
22.50
30.00
37.50
45.00
A3-A0
A
i
T
OAX
T
AIS
NOTE: Any dash number between 100 and 3000
not shown is also available.
PW
OUT
Doc #98004
3/18/98
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1